e0421bbe64
Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
88 lines
2.6 KiB
C
88 lines
2.6 KiB
C
/*
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* stmp378x: CLKCTRL register definitions
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*
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* Copyright (c) 2008 Freescale Semiconductor
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _MACH_REGS_CLKCTRL
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#define _MACH_REGS_CLKCTRL
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#define REGS_CLKCTRL_BASE (STMP3XXX_REGS_BASE + 0x40000)
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#define REGS_CLKCTRL_PHYS 0x80040000
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#define REGS_CLKCTRL_SIZE 0x2000
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#define HW_CLKCTRL_PLLCTRL0 0x0
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#define BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS 0x00040000
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#define HW_CLKCTRL_CPU 0x20
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#define BM_CLKCTRL_CPU_DIV_CPU 0x0000003F
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#define BP_CLKCTRL_CPU_DIV_CPU 0
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#define HW_CLKCTRL_HBUS 0x30
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#define BM_CLKCTRL_HBUS_DIV 0x0000001F
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#define BP_CLKCTRL_HBUS_DIV 0
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#define BM_CLKCTRL_HBUS_DIV_FRAC_EN 0x00000020
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#define HW_CLKCTRL_XBUS 0x40
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#define HW_CLKCTRL_XTAL 0x50
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#define BM_CLKCTRL_XTAL_DRI_CLK24M_GATE 0x10000000
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#define HW_CLKCTRL_PIX 0x60
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#define BM_CLKCTRL_PIX_DIV 0x00000FFF
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#define BP_CLKCTRL_PIX_DIV 0
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#define BM_CLKCTRL_PIX_CLKGATE 0x80000000
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#define HW_CLKCTRL_SSP 0x70
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#define HW_CLKCTRL_GPMI 0x80
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#define HW_CLKCTRL_SPDIF 0x90
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#define HW_CLKCTRL_EMI 0xA0
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#define BM_CLKCTRL_EMI_DIV_EMI 0x0000003F
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#define BP_CLKCTRL_EMI_DIV_EMI 0
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#define BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE 0x00010000
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#define BM_CLKCTRL_EMI_BUSY_DCC_RESYNC 0x00020000
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#define BM_CLKCTRL_EMI_BUSY_REF_EMI 0x10000000
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#define BM_CLKCTRL_EMI_BUSY_REF_XTAL 0x20000000
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#define HW_CLKCTRL_IR 0xB0
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#define HW_CLKCTRL_SAIF 0xC0
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#define HW_CLKCTRL_TV 0xD0
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#define HW_CLKCTRL_ETM 0xE0
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#define HW_CLKCTRL_FRAC 0xF0
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#define BM_CLKCTRL_FRAC_EMIFRAC 0x00003F00
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#define BP_CLKCTRL_FRAC_EMIFRAC 8
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#define BM_CLKCTRL_FRAC_PIXFRAC 0x003F0000
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#define BP_CLKCTRL_FRAC_PIXFRAC 16
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#define BM_CLKCTRL_FRAC_CLKGATEPIX 0x00800000
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#define HW_CLKCTRL_FRAC1 0x100
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#define HW_CLKCTRL_CLKSEQ 0x110
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#define BM_CLKCTRL_CLKSEQ_BYPASS_PIX 0x00000002
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#define HW_CLKCTRL_RESET 0x120
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#define BM_CLKCTRL_RESET_DIG 0x00000001
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#define BP_CLKCTRL_RESET_DIG 0
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#endif
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