This adds the interrupt layer onto the initial trout gpio changes. There changes were adapted from the Google driver which lists Arve Hjønnevåg <arve@android.com> as the author. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
		
			
				
	
	
		
			227 lines
		
	
	
	
		
			5.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			227 lines
		
	
	
	
		
			5.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * linux/arch/arm/mach-msm/gpio.c
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 *
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 * Copyright (C) 2005 HP Labs
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 * Copyright (C) 2008 Google, Inc.
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 * Copyright (C) 2009 Pavel Machek <pavel@ucw.cz>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/gpio.h>
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#include "board-trout.h"
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static uint8_t trout_int_mask[2] = {
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	[0] = 0xff, /* mask all interrupts */
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	[1] = 0xff,
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};
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static uint8_t trout_sleep_int_mask[] = {
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	[0] = 0xff,
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	[1] = 0xff,
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};
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struct msm_gpio_chip {
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	struct gpio_chip	chip;
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	void __iomem		*reg;	/* Base of register bank */
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	u8			shadow;
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};
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#define to_msm_gpio_chip(c) container_of(c, struct msm_gpio_chip, chip)
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static int msm_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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{
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	struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip);
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	unsigned mask = 1 << offset;
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	return !!(readb(msm_gpio->reg) & mask);
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}
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static void msm_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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	struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip);
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	unsigned mask = 1 << offset;
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	if (val)
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		msm_gpio->shadow |= mask;
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	else
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		msm_gpio->shadow &= ~mask;
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	writeb(msm_gpio->shadow, msm_gpio->reg);
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}
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static int msm_gpiolib_direction_input(struct gpio_chip *chip,
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					unsigned offset)
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{
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	msm_gpiolib_set(chip, offset, 0);
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	return 0;
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}
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static int msm_gpiolib_direction_output(struct gpio_chip *chip,
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					 unsigned offset, int val)
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{
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	msm_gpiolib_set(chip, offset, val);
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	return 0;
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}
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#define TROUT_GPIO_BANK(name, reg_num, base_gpio, shadow_val)		\
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	{								\
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		.chip = {						\
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			.label		  = name,			\
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			.direction_input  = msm_gpiolib_direction_input,\
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			.direction_output = msm_gpiolib_direction_output, \
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			.get		  = msm_gpiolib_get,		\
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			.set		  = msm_gpiolib_set,		\
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			.base		  = base_gpio,			\
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			.ngpio		  = 8,				\
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		},							\
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		.reg = (void *) reg_num + TROUT_CPLD_BASE,		\
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		.shadow = shadow_val,					\
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	}
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static struct msm_gpio_chip msm_gpio_banks[] = {
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#if defined(CONFIG_MSM_DEBUG_UART1)
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	/* H2W pins <-> UART1 */
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	TROUT_GPIO_BANK("MISC2", 0x00,   TROUT_GPIO_MISC2_BASE, 0x40),
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#else
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	/* H2W pins <-> UART3, Bluetooth <-> UART1 */
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	TROUT_GPIO_BANK("MISC2", 0x00,   TROUT_GPIO_MISC2_BASE, 0x80),
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#endif
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	/* I2C pull */
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	TROUT_GPIO_BANK("MISC3", 0x02,   TROUT_GPIO_MISC3_BASE, 0x04),
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	TROUT_GPIO_BANK("MISC4", 0x04,   TROUT_GPIO_MISC4_BASE, 0),
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	/* mmdi 32k en */
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	TROUT_GPIO_BANK("MISC5", 0x06,   TROUT_GPIO_MISC5_BASE, 0x04),
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	TROUT_GPIO_BANK("INT2", 0x08,    TROUT_GPIO_INT2_BASE,  0),
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	TROUT_GPIO_BANK("MISC1", 0x0a,   TROUT_GPIO_MISC1_BASE, 0),
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	TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
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};
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static void trout_gpio_irq_ack(unsigned int irq)
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{
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	int bank = TROUT_INT_TO_BANK(irq);
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	uint8_t mask = TROUT_INT_TO_MASK(irq);
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	int reg = TROUT_BANK_TO_STAT_REG(bank);
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	/*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/
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	writeb(mask, TROUT_CPLD_BASE + reg);
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}
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static void trout_gpio_irq_mask(unsigned int irq)
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{
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	unsigned long flags;
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	uint8_t reg_val;
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	int bank = TROUT_INT_TO_BANK(irq);
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	uint8_t mask = TROUT_INT_TO_MASK(irq);
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	int reg = TROUT_BANK_TO_MASK_REG(bank);
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	local_irq_save(flags);
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	reg_val = trout_int_mask[bank] |= mask;
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	/*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n",
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	       irq, bank, reg_val);*/
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	writeb(reg_val, TROUT_CPLD_BASE + reg);
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	local_irq_restore(flags);
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}
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static void trout_gpio_irq_unmask(unsigned int irq)
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{
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	unsigned long flags;
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	uint8_t reg_val;
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	int bank = TROUT_INT_TO_BANK(irq);
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	uint8_t mask = TROUT_INT_TO_MASK(irq);
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	int reg = TROUT_BANK_TO_MASK_REG(bank);
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	local_irq_save(flags);
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	reg_val = trout_int_mask[bank] &= ~mask;
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	/*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n",
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	       irq, bank, reg_val);*/
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	writeb(reg_val, TROUT_CPLD_BASE + reg);
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	local_irq_restore(flags);
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}
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int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on)
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{
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	unsigned long flags;
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	int bank = TROUT_INT_TO_BANK(irq);
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	uint8_t mask = TROUT_INT_TO_MASK(irq);
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	local_irq_save(flags);
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	if(on)
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		trout_sleep_int_mask[bank] &= ~mask;
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	else
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		trout_sleep_int_mask[bank] |= mask;
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	local_irq_restore(flags);
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	return 0;
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}
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static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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	int j, m;
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	unsigned v;
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	int bank;
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	int stat_reg;
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	int int_base = TROUT_INT_START;
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	uint8_t int_mask;
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	for (bank = 0; bank < 2; bank++) {
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		stat_reg = TROUT_BANK_TO_STAT_REG(bank);
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		v = readb(TROUT_CPLD_BASE + stat_reg);
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		int_mask = trout_int_mask[bank];
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		if (v & int_mask) {
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			writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg);
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			printk(KERN_ERR "trout_gpio_irq_handler: got masked "
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			       "interrupt: %d:%02x\n", bank, v & int_mask);
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		}
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		v &= ~int_mask;
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		while (v) {
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			m = v & -v;
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			j = fls(m) - 1;
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			/*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b"
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			       "it %d irq %d\n", bank, v, m, j, int_base + j);*/
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			v &= ~m;
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			generic_handle_irq(int_base + j);
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		}
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		int_base += TROUT_INT_BANK0_COUNT;
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	}
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	desc->chip->ack(irq);
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}
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static struct irq_chip trout_gpio_irq_chip = {
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	.name      = "troutgpio",
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	.ack       = trout_gpio_irq_ack,
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	.mask      = trout_gpio_irq_mask,
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	.unmask    = trout_gpio_irq_unmask,
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	.set_wake  = trout_gpio_irq_set_wake,
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};
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/*
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 * Called from the processor-specific init to enable GPIO pin support.
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 */
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int __init trout_init_gpio(void)
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{
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	int i;
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	for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
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		set_irq_chip(i, &trout_gpio_irq_chip);
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		set_irq_handler(i, handle_edge_irq);
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		set_irq_flags(i, IRQF_VALID);
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	}
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	for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
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		gpiochip_add(&msm_gpio_banks[i].chip);
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	set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
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	set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
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	set_irq_wake(MSM_GPIO_TO_INT(17), 1);
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	return 0;
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}
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postcore_initcall(trout_init_gpio);
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