125 lines
2.7 KiB
C
125 lines
2.7 KiB
C
/*
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
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* Copyright (C) 2001 Ralf Baechle
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* Portions copyright (C) 2009 Cisco Systems, Inc.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Routines for generic manipulation of the interrupts found on the PowerTV
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* platform.
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*
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* The interrupt controller is located in the South Bridge a PIIX4 device
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* with two internal 82C95 interrupt controllers.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/kernel.h>
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#include <linux/random.h>
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#include <asm/irq_cpu.h>
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#include <linux/io.h>
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#include <asm/irq_regs.h>
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#include <asm/mips-boards/generic.h>
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#include <asm/mach-powertv/asic_regs.h>
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static DEFINE_RAW_SPINLOCK(asic_irq_lock);
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static inline int get_int(void)
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{
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unsigned long flags;
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int irq;
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raw_spin_lock_irqsave(&asic_irq_lock, flags);
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irq = (asic_read(int_int_scan) >> 4) - 1;
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if (irq == 0 || irq >= NR_IRQS)
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irq = -1;
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raw_spin_unlock_irqrestore(&asic_irq_lock, flags);
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return irq;
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}
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static void asic_irqdispatch(void)
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{
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int irq;
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irq = get_int();
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if (irq < 0)
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return; /* interrupt has already been cleared */
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do_IRQ(irq);
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}
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static inline int clz(unsigned long x)
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{
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__asm__(
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" .set push \n"
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" .set mips32 \n"
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" clz %0, %1 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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/*
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* Version of ffs that only looks at bits 12..15.
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*/
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static inline unsigned int irq_ffs(unsigned int pending)
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{
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return fls(pending) - 1 + CAUSEB_IP;
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}
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/*
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* TODO: check how it works under EIC mode.
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*/
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
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int irq;
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irq = irq_ffs(pending);
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if (irq == CAUSEF_IP3)
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asic_irqdispatch();
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else if (irq >= 0)
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do_IRQ(irq);
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else
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spurious_interrupt();
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}
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void __init arch_init_irq(void)
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{
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int i;
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asic_irq_init();
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/*
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* Initialize interrupt exception vectors.
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*/
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if (cpu_has_veic || cpu_has_vint) {
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int nvec = cpu_has_veic ? 64 : 8;
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for (i = 0; i < nvec; i++)
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set_vi_handler(i, asic_irqdispatch);
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}
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}
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