5e696617c4
This splits the mmu_context handling between 32-bit hash based processors, 64-bit hash based processors and everybody else. This is preliminary work for adding SMP support for BookE processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
103 lines
3.1 KiB
C
103 lines
3.1 KiB
C
/*
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* This file contains the routines for handling the MMU on those
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* PowerPC implementations where the MMU substantially follows the
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* architecture specification. This includes the 6xx, 7xx, 7xxx,
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* 8260, and POWER3 implementations but excludes the 8xx and 4xx.
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* -- paulus
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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/*
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* On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
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* (virtual segment identifiers) for each context. Although the
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* hardware supports 24-bit VSIDs, and thus >1 million contexts,
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* we only use 32,768 of them. That is ample, since there can be
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* at most around 30,000 tasks in the system anyway, and it means
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* that we can use a bitmap to indicate which contexts are in use.
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* Using a bitmap means that we entirely avoid all of the problems
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* that we used to have when the context number overflowed,
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* particularly on SMP systems.
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* -- paulus.
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*/
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#define NO_CONTEXT ((unsigned long) -1)
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#define LAST_CONTEXT 32767
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#define FIRST_CONTEXT 1
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/*
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* This function defines the mapping from contexts to VSIDs (virtual
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* segment IDs). We use a skew on both the context and the high 4 bits
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* of the 32-bit virtual address (the "effective segment ID") in order
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* to spread out the entries in the MMU hash table. Note, if this
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* function is changed then arch/ppc/mm/hashtable.S will have to be
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* changed to correspond.
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*
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*
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* CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
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* & 0xffffff)
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*/
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static unsigned long next_mmu_context;
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static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
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/*
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* Set up the context for a new address space.
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*/
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int init_new_context(struct task_struct *t, struct mm_struct *mm)
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{
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unsigned long ctx = next_mmu_context;
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while (test_and_set_bit(ctx, context_map)) {
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ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
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if (ctx > LAST_CONTEXT)
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ctx = 0;
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}
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next_mmu_context = (ctx + 1) & LAST_CONTEXT;
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mm->context.id = ctx;
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return 0;
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}
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/*
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* We're finished using the context for an address space.
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*/
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void destroy_context(struct mm_struct *mm)
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{
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preempt_disable();
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if (mm->context.id != NO_CONTEXT) {
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clear_bit(mm->context.id, context_map);
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mm->context.id = NO_CONTEXT;
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}
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preempt_enable();
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}
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/*
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* Initialize the context management stuff.
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*/
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void __init mmu_context_init(void)
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{
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/* Reserve context 0 for kernel use */
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context_map[0] = (1 << FIRST_CONTEXT) - 1;
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next_mmu_context = FIRST_CONTEXT;
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}
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