f41b177157
All the architectures properly set NEED_DMA_MAP_STATE now so we can safely add linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h inclusion in arch's asm/pci.h Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
#ifndef ASMARM_PCI_H
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#define ASMARM_PCI_H
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#ifdef __KERNEL__
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#include <asm-generic/pci-dma-compat.h>
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#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
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#ifdef CONFIG_PCI_HOST_ITE8152
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/* ITE bridge requires setting latency timer to avoid early bus access
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termination by PIC bus mater devices
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*/
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extern void pcibios_set_master(struct pci_dev *dev);
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#else
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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/* No special bus mastering setup handling */
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}
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#endif
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static inline void pcibios_penalize_isa_irq(int irq, int active)
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{
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/* We don't do dynamic PCI IRQ allocation */
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}
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/*
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* The PCI address space does equal the physical memory address space.
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* The networking and block device layers use this boolean for bounce
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* buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (1)
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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#define HAVE_PCI_MMAP
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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extern void
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pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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struct resource *res);
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extern void
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pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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struct pci_bus_region *region);
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/*
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* Dummy implementation; always return 0.
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*/
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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return 0;
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}
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#endif /* __KERNEL__ */
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#endif
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