 1da177e4c3
			
		
	
	
	1da177e4c3
	
	
	
		
			
			Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
		
			
				
	
	
		
			54 lines
		
	
	
	
		
			1.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			54 lines
		
	
	
	
		
			1.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * Copyright (C) 1998, 1999, 2003 by Ralf Baechle
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|  */
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| #ifndef _ASM_TIMEX_H
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| #define _ASM_TIMEX_H
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| 
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| #include <asm/mipsregs.h>
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| 
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| /*
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|  * This is the frequency of the timer used for Linux's timer interrupt.
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|  * The value should be defined as accurate as possible or under certain
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|  * circumstances Linux timekeeping might become inaccurate or fail.
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|  *
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|  * For many system the exact clockrate of the timer isn't known but due to
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|  * the way this value is used we can get away with a wrong value as long
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|  * as this value is:
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|  *
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|  *  - a multiple of HZ
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|  *  - a divisor of the actual rate
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|  *
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|  * 500000 is a good such cheat value.
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|  *
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|  * The obscure number 1193182 is the same as used by the original i8254
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|  * time in legacy PC hardware; the chip unfortunately also found in a
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|  * bunch of MIPS systems.  The last remaining user of the i8254 for the
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|  * timer interrupt is the RM200; it's a very standard system so there is
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|  * no reason to make this a separate architecture.
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|  */
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| 
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| #include <timex.h>
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| 
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| /*
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|  * Standard way to access the cycle counter.
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|  * Currently only used on SMP for scheduling.
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|  *
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|  * Only the low 32 bits are available as a continuously counting entity.
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|  * But this only means we'll force a reschedule every 8 seconds or so,
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|  * which isn't an evil thing.
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|  *
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|  * We know that all SMP capable CPUs have cycle counters.
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|  */
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| 
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| typedef unsigned int cycles_t;
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| 
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| static inline cycles_t get_cycles (void)
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| {
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| 	return read_c0_count();
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| }
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| 
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| #endif /*  _ASM_TIMEX_H */
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