0b3eb21b2f
Implement an irq chip to handle interrupts via gpio. The GPIO chip initialization function now takes a bitmask denoting pins that should be configured for their alternate function. changes compared to v1: - fixed bug on edge interrupt configuration - accommodated to function name change - moved definition of VARIANT_NR_IRQS to this patch - renamed __XTENSA_S6000_IRQ_H to _XTENSA_S6000_IRQ_H as requested Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: Johannes Weiner <jw@emlix.com> Signed-off-by: Chris Zankel <chris@zankel.net>
6 lines
154 B
C
6 lines
154 B
C
#ifndef _XTENSA_VARIANT_S6000_GPIO_H
|
|
#define _XTENSA_VARIANT_S6000_GPIO_H
|
|
|
|
extern int s6_gpio_init(u32 afsel);
|
|
|
|
#endif /* _XTENSA_VARIANT_S6000_GPIO_H */
|