CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Doug Thompson <dougthompson@xmission.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Mark Gross <mark.gross@intel.com> Cc: Jason Uhlenkott <juhlenko@akamai.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Tim Small <tim@buttersideup.com> Cc: Ranganathan Desikan <ravi@jetztechnologies.com> Cc: "Arvind R." <arvino55@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Daney <david.daney@cavium.com> Cc: Egor Martovetsky <egor@pasemi.com> Cc: Olof Johansson <olof@lixom.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			282 lines
		
	
	
	
		
			7.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			282 lines
		
	
	
	
		
			7.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Cell MIC driver for ECC counting
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 *
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 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
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 *                <benh@kernel.crashing.org>
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 *
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 * This file may be distributed under the terms of the
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 * GNU General Public License.
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 */
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#undef DEBUG
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#include <linux/edac.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/stop_machine.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/cell-regs.h>
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#include "edac_core.h"
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struct cell_edac_priv
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{
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	struct cbe_mic_tm_regs __iomem	*regs;
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	int				node;
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	int				chanmask;
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#ifdef DEBUG
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	u64				prev_fir;
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#endif
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};
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static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
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{
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	struct cell_edac_priv		*priv = mci->pvt_info;
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	struct csrow_info		*csrow = mci->csrows[0];
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	unsigned long			address, pfn, offset, syndrome;
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	dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
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		priv->node, chan, ar);
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	/* Address decoding is likely a bit bogus, to dbl check */
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	address = (ar & 0xffffffffe0000000ul) >> 29;
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	if (priv->chanmask == 0x3)
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		address = (address << 1) | chan;
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	pfn = address >> PAGE_SHIFT;
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	offset = address & ~PAGE_MASK;
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	syndrome = (ar & 0x000000001fe00000ul) >> 21;
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	/* TODO: Decoding of the error address */
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	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
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			     csrow->first_page + pfn, offset, syndrome,
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			     0, chan, -1, "", "");
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}
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static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
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{
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	struct cell_edac_priv		*priv = mci->pvt_info;
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	struct csrow_info		*csrow = mci->csrows[0];
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	unsigned long			address, pfn, offset;
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	dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
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		priv->node, chan, ar);
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	/* Address decoding is likely a bit bogus, to dbl check */
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	address = (ar & 0xffffffffe0000000ul) >> 29;
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	if (priv->chanmask == 0x3)
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		address = (address << 1) | chan;
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	pfn = address >> PAGE_SHIFT;
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	offset = address & ~PAGE_MASK;
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	/* TODO: Decoding of the error address */
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	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
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			     csrow->first_page + pfn, offset, 0,
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			     0, chan, -1, "", "");
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}
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static void cell_edac_check(struct mem_ctl_info *mci)
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{
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	struct cell_edac_priv		*priv = mci->pvt_info;
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	u64				fir, addreg, clear = 0;
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	fir = in_be64(&priv->regs->mic_fir);
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#ifdef DEBUG
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	if (fir != priv->prev_fir) {
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		dev_dbg(mci->pdev, "fir change : 0x%016lx\n", fir);
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		priv->prev_fir = fir;
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	}
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#endif
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	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_SINGLE_0_ERR)) {
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		addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
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		clear |= CBE_MIC_FIR_ECC_SINGLE_0_RESET;
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		cell_edac_count_ce(mci, 0, addreg);
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	}
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	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_SINGLE_1_ERR)) {
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		addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
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		clear |= CBE_MIC_FIR_ECC_SINGLE_1_RESET;
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		cell_edac_count_ce(mci, 1, addreg);
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	}
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	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_MULTI_0_ERR)) {
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		addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
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		clear |= CBE_MIC_FIR_ECC_MULTI_0_RESET;
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		cell_edac_count_ue(mci, 0, addreg);
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	}
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	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_MULTI_1_ERR)) {
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		addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
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		clear |= CBE_MIC_FIR_ECC_MULTI_1_RESET;
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		cell_edac_count_ue(mci, 1, addreg);
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	}
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	/* The procedure for clearing FIR bits is a bit ... weird */
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	if (clear) {
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		fir &= ~(CBE_MIC_FIR_ECC_ERR_MASK | CBE_MIC_FIR_ECC_SET_MASK);
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		fir |= CBE_MIC_FIR_ECC_RESET_MASK;
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		fir &= ~clear;
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		out_be64(&priv->regs->mic_fir, fir);
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		(void)in_be64(&priv->regs->mic_fir);
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		mb();	/* sync up */
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#ifdef DEBUG
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		fir = in_be64(&priv->regs->mic_fir);
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		dev_dbg(mci->pdev, "fir clear  : 0x%016lx\n", fir);
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#endif
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	}
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}
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static void cell_edac_init_csrows(struct mem_ctl_info *mci)
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{
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	struct csrow_info		*csrow = mci->csrows[0];
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	struct dimm_info		*dimm;
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	struct cell_edac_priv		*priv = mci->pvt_info;
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	struct device_node		*np;
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	int				j;
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	u32				nr_pages;
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	for (np = NULL;
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	     (np = of_find_node_by_name(np, "memory")) != NULL;) {
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		struct resource r;
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		/* We "know" that the Cell firmware only creates one entry
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		 * in the "memory" nodes. If that changes, this code will
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		 * need to be adapted.
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		 */
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		if (of_address_to_resource(np, 0, &r))
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			continue;
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		if (of_node_to_nid(np) != priv->node)
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			continue;
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		csrow->first_page = r.start >> PAGE_SHIFT;
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		nr_pages = resource_size(&r) >> PAGE_SHIFT;
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		csrow->last_page = csrow->first_page + nr_pages - 1;
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		for (j = 0; j < csrow->nr_channels; j++) {
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			dimm = csrow->channels[j]->dimm;
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			dimm->mtype = MEM_XDR;
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			dimm->edac_mode = EDAC_SECDED;
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			dimm->nr_pages = nr_pages / csrow->nr_channels;
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		}
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		dev_dbg(mci->pdev,
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			"Initialized on node %d, chanmask=0x%x,"
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			" first_page=0x%lx, nr_pages=0x%x\n",
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			priv->node, priv->chanmask,
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			csrow->first_page, nr_pages);
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		break;
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	}
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}
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static int cell_edac_probe(struct platform_device *pdev)
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{
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	struct cbe_mic_tm_regs __iomem	*regs;
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	struct mem_ctl_info		*mci;
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	struct edac_mc_layer		layers[2];
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	struct cell_edac_priv		*priv;
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	u64				reg;
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	int				rc, chanmask, num_chans;
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	regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev->id));
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	if (regs == NULL)
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		return -ENODEV;
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	edac_op_state = EDAC_OPSTATE_POLL;
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	/* Get channel population */
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	reg = in_be64(®s->mic_mnt_cfg);
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	dev_dbg(&pdev->dev, "MIC_MNT_CFG = 0x%016llx\n", reg);
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	chanmask = 0;
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	if (reg & CBE_MIC_MNT_CFG_CHAN_0_POP)
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		chanmask |= 0x1;
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	if (reg & CBE_MIC_MNT_CFG_CHAN_1_POP)
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		chanmask |= 0x2;
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	if (chanmask == 0) {
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		dev_warn(&pdev->dev,
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			 "Yuck ! No channel populated ? Aborting !\n");
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		return -ENODEV;
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	}
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	dev_dbg(&pdev->dev, "Initial FIR = 0x%016llx\n",
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		in_be64(®s->mic_fir));
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	/* Allocate & init EDAC MC data structure */
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	num_chans = chanmask == 3 ? 2 : 1;
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	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
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	layers[0].size = 1;
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	layers[0].is_virt_csrow = true;
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	layers[1].type = EDAC_MC_LAYER_CHANNEL;
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	layers[1].size = num_chans;
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	layers[1].is_virt_csrow = false;
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	mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers,
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			    sizeof(struct cell_edac_priv));
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	if (mci == NULL)
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		return -ENOMEM;
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	priv = mci->pvt_info;
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	priv->regs = regs;
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	priv->node = pdev->id;
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	priv->chanmask = chanmask;
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	mci->pdev = &pdev->dev;
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	mci->mtype_cap = MEM_FLAG_XDR;
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	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
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	mci->edac_cap = EDAC_FLAG_EC | EDAC_FLAG_SECDED;
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	mci->mod_name = "cell_edac";
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	mci->ctl_name = "MIC";
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	mci->dev_name = dev_name(&pdev->dev);
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	mci->edac_check = cell_edac_check;
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	cell_edac_init_csrows(mci);
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	/* Register with EDAC core */
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	rc = edac_mc_add_mc(mci);
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	if (rc) {
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		dev_err(&pdev->dev, "failed to register with EDAC core\n");
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		edac_mc_free(mci);
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		return rc;
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	}
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	return 0;
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}
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static int cell_edac_remove(struct platform_device *pdev)
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{
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	struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);
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	if (mci)
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		edac_mc_free(mci);
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	return 0;
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}
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static struct platform_driver cell_edac_driver = {
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	.driver		= {
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		.name	= "cbe-mic",
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		.owner	= THIS_MODULE,
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	},
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	.probe		= cell_edac_probe,
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	.remove		= cell_edac_remove,
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};
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static int __init cell_edac_init(void)
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{
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	/* Sanity check registers data structure */
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_df_ecc_address_0) != 0xf8);
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_df_ecc_address_1) != 0x1b8);
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_df_config) != 0x218);
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_fir) != 0x230);
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_mnt_cfg) != 0x210);
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	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
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			      mic_exc) != 0x208);
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	return platform_driver_register(&cell_edac_driver);
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}
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static void __exit cell_edac_exit(void)
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{
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	platform_driver_unregister(&cell_edac_driver);
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}
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module_init(cell_edac_init);
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module_exit(cell_edac_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
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MODULE_DESCRIPTION("ECC counting for Cell MIC");
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