f5c4227133
This patch does the actual device tree switch for the LPC32xx SoC. Signed-off-by: Roland Stigge <stigge@antcom.de>
65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
/*
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* arch/arm/mach-lpc32xx/common.h
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*
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* Author: Kevin Wells <kevin.wells@nxp.com>
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*
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* Copyright (C) 2009-2010 NXP Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __LPC32XX_COMMON_H
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#define __LPC32XX_COMMON_H
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#include <mach/board.h>
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#include <linux/platform_device.h>
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/*
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* Other arch specific structures and functions
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*/
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extern struct sys_timer lpc32xx_timer;
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extern void __init lpc32xx_init_irq(void);
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extern void __init lpc32xx_map_io(void);
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extern void __init lpc32xx_serial_init(void);
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extern void lpc23xx_restart(char, const char *);
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/*
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* Structure used for setting up and querying the PLLS
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*/
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struct clk_pll_setup {
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int analog_on;
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int cco_bypass_b15;
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int direct_output_b14;
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int fdbk_div_ctrl_b13;
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int pll_p;
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int pll_n;
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u32 pll_m;
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};
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extern int clk_is_sysclk_mainosc(void);
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extern u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup);
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extern u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval);
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extern u32 clk_get_pclk_div(void);
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/*
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* Returns the LPC32xx unique 128-bit chip ID
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*/
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extern void lpc32xx_get_uid(u32 devid[4]);
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extern u32 lpc32xx_return_iram_size(void);
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/*
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* Pointers used for sizing and copying suspend function data
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*/
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extern int lpc32xx_sys_suspend(void);
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extern int lpc32xx_sys_suspend_sz;
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#endif
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