2b03adc191
- Clean PCI and DMA handling - Use generic device.h - Some cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlOQT0MACgkQykllyylKDCF7mwCbBso3EMWGPPkpMiieYiy6pVze AYYAoJ4xyXwVZC+bNf6Bf3ojU7QXPQc1 =qXNT -----END PGP SIGNATURE----- Merge tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze into next Pull Microblaze updates from Michal Simek: - cleanup PCI and DMA handling - use generic device.h - some cleanups * tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix typo in head.S s/substract/subtract/ microblaze: remove check for CONFIG_XILINX_CONSOLE microblaze: Use generic device.h microblaze: Do not setup empty unmap_sg function microblaze: Remove device_to_mask microblaze: Clean device dma_ops structure microblaze: Cleanup PCI_DRAM_OFFSET handling microblaze: Do not setup pci_dma_ops microblaze: Return default dma operations microblaze: Enable SERIAL_OF_PLATFORM
142 lines
4 KiB
C
142 lines
4 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Based on powerpc version
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*/
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#ifndef __ASM_MICROBLAZE_PCI_H
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#define __ASM_MICROBLAZE_PCI_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/dma-mapping.h>
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#include <linux/pci.h>
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#include <asm/scatterlist.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#include <asm-generic/pci-dma-compat.h>
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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struct pci_dev;
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/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
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#define IOBASE_BRIDGE_NUMBER 0
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#define IOBASE_MEMORY 1
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#define IOBASE_IO 2
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#define IOBASE_ISA_IO 3
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#define IOBASE_ISA_MEM 4
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#define pcibios_scan_all_fns(a, b) 0
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/*
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers (don't do that on ppc64 yet !)
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*/
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#define pcibios_assign_all_busses() 0
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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extern int pci_domain_nr(struct pci_bus *bus);
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/* Decide whether to display the domain number in /proc */
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extern int pci_proc_domain(struct pci_bus *bus);
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struct vm_area_struct;
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/* Map a range of PCI memory or I/O space for a device into user space */
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int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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#define HAVE_PCI_MMAP 1
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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size_t count);
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extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
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size_t count);
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state);
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#define HAVE_PCI_LEGACY 1
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/* The PCI address space does equal the physical memory
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* address space (no IOMMU). The IDE and SCSI device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (1)
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static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
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struct resource *res)
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{
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struct resource *root = NULL;
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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return root;
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}
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extern void pcibios_claim_one_bus(struct pci_bus *b);
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extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
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extern void pcibios_resource_survey(void);
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extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
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extern int remove_phb_dynamic(struct pci_controller *phb);
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extern struct pci_dev *of_create_pci_dev(struct device_node *node,
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struct pci_bus *bus, int devfn);
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extern void of_scan_pci_bridge(struct device_node *node,
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struct pci_dev *dev);
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extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
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extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
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extern int pci_bus_find_capability(struct pci_bus *bus,
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unsigned int devfn, int cap);
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struct file;
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extern pgprot_t pci_phys_mem_access_prot(struct file *file,
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unsigned long pfn,
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unsigned long size,
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pgprot_t prot);
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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resource_size_t *start, resource_size_t *end);
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extern void pcibios_setup_bus_devices(struct pci_bus *bus);
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extern void pcibios_setup_bus_self(struct pci_bus *bus);
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/* This part of code was originally in xilinx-pci.h */
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#ifdef CONFIG_PCI_XILINX
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extern void __init xilinx_pci_init(void);
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#else
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static inline void __init xilinx_pci_init(void) { return; }
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_MICROBLAZE_PCI_H */
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