PMU interrupts start at IRQ_DOVE_PMU_START, not IRQ_DOVE_PMU_START + 1. Fix the condition. (It may have been less likely to occur had the code been written "if (irq >= IRQ_DOVE_PMU_START" which imho is the easier to understand notation, and matches the normal way of thinking about these things.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: stable@vger.kernel.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
		
			
				
	
	
		
			72 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			72 lines
		
	
	
	
		
			2.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * arch/arm/mach-dove/include/mach/pm.h
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 *
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 * This file is licensed under the terms of the GNU General Public
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 * License version 2.  This program is licensed "as is" without any
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 * warranty of any kind, whether express or implied.
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 */
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#ifndef __ASM_ARCH_PM_H
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#define __ASM_ARCH_PM_H
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#include <asm/errno.h>
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#include <mach/irqs.h>
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#define CLOCK_GATING_CONTROL	(DOVE_PMU_VIRT_BASE + 0x38)
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#define  CLOCK_GATING_BIT_USB0		0
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#define  CLOCK_GATING_BIT_USB1		1
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#define  CLOCK_GATING_BIT_GBE		2
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#define  CLOCK_GATING_BIT_SATA		3
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#define  CLOCK_GATING_BIT_PCIE0		4
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#define  CLOCK_GATING_BIT_PCIE1		5
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#define  CLOCK_GATING_BIT_SDIO0		8
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#define  CLOCK_GATING_BIT_SDIO1		9
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#define  CLOCK_GATING_BIT_NAND		10
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#define  CLOCK_GATING_BIT_CAMERA	11
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#define  CLOCK_GATING_BIT_I2S0		12
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#define  CLOCK_GATING_BIT_I2S1		13
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#define  CLOCK_GATING_BIT_CRYPTO	15
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#define  CLOCK_GATING_BIT_AC97		21
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#define  CLOCK_GATING_BIT_PDMA		22
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#define  CLOCK_GATING_BIT_XOR0		23
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#define  CLOCK_GATING_BIT_XOR1		24
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#define  CLOCK_GATING_BIT_GIGA_PHY	30
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#define  CLOCK_GATING_USB0_MASK		(1 << CLOCK_GATING_BIT_USB0)
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#define  CLOCK_GATING_USB1_MASK		(1 << CLOCK_GATING_BIT_USB1)
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#define  CLOCK_GATING_GBE_MASK		(1 << CLOCK_GATING_BIT_GBE)
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#define  CLOCK_GATING_SATA_MASK		(1 << CLOCK_GATING_BIT_SATA)
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#define  CLOCK_GATING_PCIE0_MASK	(1 << CLOCK_GATING_BIT_PCIE0)
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#define  CLOCK_GATING_PCIE1_MASK	(1 << CLOCK_GATING_BIT_PCIE1)
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#define  CLOCK_GATING_SDIO0_MASK	(1 << CLOCK_GATING_BIT_SDIO0)
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#define  CLOCK_GATING_SDIO1_MASK	(1 << CLOCK_GATING_BIT_SDIO1)
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#define  CLOCK_GATING_NAND_MASK		(1 << CLOCK_GATING_BIT_NAND)
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#define  CLOCK_GATING_CAMERA_MASK	(1 << CLOCK_GATING_BIT_CAMERA)
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#define  CLOCK_GATING_I2S0_MASK		(1 << CLOCK_GATING_BIT_I2S0)
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#define  CLOCK_GATING_I2S1_MASK		(1 << CLOCK_GATING_BIT_I2S1)
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#define  CLOCK_GATING_CRYPTO_MASK	(1 << CLOCK_GATING_BIT_CRYPTO)
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#define  CLOCK_GATING_AC97_MASK		(1 << CLOCK_GATING_BIT_AC97)
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#define  CLOCK_GATING_PDMA_MASK		(1 << CLOCK_GATING_BIT_PDMA)
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#define  CLOCK_GATING_XOR0_MASK		(1 << CLOCK_GATING_BIT_XOR0)
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#define  CLOCK_GATING_XOR1_MASK		(1 << CLOCK_GATING_BIT_XOR1)
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#define  CLOCK_GATING_GIGA_PHY_MASK	(1 << CLOCK_GATING_BIT_GIGA_PHY)
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#define PMU_INTERRUPT_CAUSE	(DOVE_PMU_VIRT_BASE + 0x50)
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#define PMU_INTERRUPT_MASK	(DOVE_PMU_VIRT_BASE + 0x54)
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static inline int pmu_to_irq(int pin)
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{
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	if (pin < NR_PMU_IRQS)
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		return pin + IRQ_DOVE_PMU_START;
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	return -EINVAL;
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}
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static inline int irq_to_pmu(int irq)
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{
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	if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
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		return irq - IRQ_DOVE_PMU_START;
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	return -EINVAL;
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}
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#endif
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