CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Barry Song <baohua.song@csr.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			421 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			421 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2012 Freescale Semiconductor, Inc.
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 *
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 * The code contained herein is licensed under the GNU General Public
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 * License. You may obtain a copy of the GNU General Public License
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 * Version 2 or later at the following locations:
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 *
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 * http://www.opensource.org/licenses/gpl-license.html
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 * http://www.gnu.org/copyleft/gpl.html
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 */
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-mxs.h"
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enum imx28_pin_enum {
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	GPMI_D00	= PINID(0, 0),
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	GPMI_D01	= PINID(0, 1),
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	GPMI_D02	= PINID(0, 2),
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	GPMI_D03	= PINID(0, 3),
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	GPMI_D04	= PINID(0, 4),
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	GPMI_D05	= PINID(0, 5),
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	GPMI_D06	= PINID(0, 6),
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	GPMI_D07	= PINID(0, 7),
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	GPMI_CE0N	= PINID(0, 16),
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	GPMI_CE1N	= PINID(0, 17),
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	GPMI_CE2N	= PINID(0, 18),
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	GPMI_CE3N	= PINID(0, 19),
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	GPMI_RDY0	= PINID(0, 20),
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	GPMI_RDY1	= PINID(0, 21),
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	GPMI_RDY2	= PINID(0, 22),
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	GPMI_RDY3	= PINID(0, 23),
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	GPMI_RDN	= PINID(0, 24),
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	GPMI_WRN	= PINID(0, 25),
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	GPMI_ALE	= PINID(0, 26),
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	GPMI_CLE	= PINID(0, 27),
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	GPMI_RESETN	= PINID(0, 28),
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	LCD_D00		= PINID(1, 0),
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	LCD_D01		= PINID(1, 1),
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	LCD_D02		= PINID(1, 2),
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	LCD_D03		= PINID(1, 3),
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	LCD_D04		= PINID(1, 4),
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	LCD_D05		= PINID(1, 5),
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	LCD_D06		= PINID(1, 6),
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	LCD_D07		= PINID(1, 7),
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	LCD_D08		= PINID(1, 8),
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	LCD_D09		= PINID(1, 9),
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	LCD_D10		= PINID(1, 10),
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	LCD_D11		= PINID(1, 11),
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	LCD_D12		= PINID(1, 12),
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	LCD_D13		= PINID(1, 13),
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	LCD_D14		= PINID(1, 14),
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	LCD_D15		= PINID(1, 15),
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	LCD_D16		= PINID(1, 16),
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	LCD_D17		= PINID(1, 17),
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	LCD_D18		= PINID(1, 18),
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	LCD_D19		= PINID(1, 19),
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	LCD_D20		= PINID(1, 20),
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	LCD_D21		= PINID(1, 21),
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	LCD_D22		= PINID(1, 22),
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	LCD_D23		= PINID(1, 23),
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	LCD_RD_E	= PINID(1, 24),
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	LCD_WR_RWN	= PINID(1, 25),
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	LCD_RS		= PINID(1, 26),
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	LCD_CS		= PINID(1, 27),
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	LCD_VSYNC	= PINID(1, 28),
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	LCD_HSYNC	= PINID(1, 29),
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	LCD_DOTCLK	= PINID(1, 30),
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	LCD_ENABLE	= PINID(1, 31),
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	SSP0_DATA0	= PINID(2, 0),
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	SSP0_DATA1	= PINID(2, 1),
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	SSP0_DATA2	= PINID(2, 2),
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	SSP0_DATA3	= PINID(2, 3),
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	SSP0_DATA4	= PINID(2, 4),
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	SSP0_DATA5	= PINID(2, 5),
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	SSP0_DATA6	= PINID(2, 6),
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	SSP0_DATA7	= PINID(2, 7),
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	SSP0_CMD	= PINID(2, 8),
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	SSP0_DETECT	= PINID(2, 9),
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	SSP0_SCK	= PINID(2, 10),
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	SSP1_SCK	= PINID(2, 12),
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	SSP1_CMD	= PINID(2, 13),
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	SSP1_DATA0	= PINID(2, 14),
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	SSP1_DATA3	= PINID(2, 15),
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	SSP2_SCK	= PINID(2, 16),
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	SSP2_MOSI	= PINID(2, 17),
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	SSP2_MISO	= PINID(2, 18),
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	SSP2_SS0	= PINID(2, 19),
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	SSP2_SS1	= PINID(2, 20),
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	SSP2_SS2	= PINID(2, 21),
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	SSP3_SCK	= PINID(2, 24),
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	SSP3_MOSI	= PINID(2, 25),
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	SSP3_MISO	= PINID(2, 26),
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	SSP3_SS0	= PINID(2, 27),
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	AUART0_RX	= PINID(3, 0),
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	AUART0_TX	= PINID(3, 1),
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	AUART0_CTS	= PINID(3, 2),
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	AUART0_RTS	= PINID(3, 3),
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	AUART1_RX	= PINID(3, 4),
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	AUART1_TX	= PINID(3, 5),
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	AUART1_CTS	= PINID(3, 6),
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	AUART1_RTS	= PINID(3, 7),
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	AUART2_RX	= PINID(3, 8),
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	AUART2_TX	= PINID(3, 9),
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	AUART2_CTS	= PINID(3, 10),
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	AUART2_RTS	= PINID(3, 11),
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	AUART3_RX	= PINID(3, 12),
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	AUART3_TX	= PINID(3, 13),
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	AUART3_CTS	= PINID(3, 14),
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	AUART3_RTS	= PINID(3, 15),
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	PWM0		= PINID(3, 16),
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	PWM1		= PINID(3, 17),
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	PWM2		= PINID(3, 18),
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	SAIF0_MCLK	= PINID(3, 20),
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	SAIF0_LRCLK	= PINID(3, 21),
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	SAIF0_BITCLK	= PINID(3, 22),
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	SAIF0_SDATA0	= PINID(3, 23),
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	I2C0_SCL	= PINID(3, 24),
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	I2C0_SDA	= PINID(3, 25),
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	SAIF1_SDATA0	= PINID(3, 26),
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	SPDIF		= PINID(3, 27),
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	PWM3		= PINID(3, 28),
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	PWM4		= PINID(3, 29),
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	LCD_RESET	= PINID(3, 30),
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	ENET0_MDC	= PINID(4, 0),
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	ENET0_MDIO	= PINID(4, 1),
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	ENET0_RX_EN	= PINID(4, 2),
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	ENET0_RXD0	= PINID(4, 3),
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	ENET0_RXD1	= PINID(4, 4),
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	ENET0_TX_CLK	= PINID(4, 5),
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	ENET0_TX_EN	= PINID(4, 6),
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	ENET0_TXD0	= PINID(4, 7),
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	ENET0_TXD1	= PINID(4, 8),
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	ENET0_RXD2	= PINID(4, 9),
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	ENET0_RXD3	= PINID(4, 10),
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	ENET0_TXD2	= PINID(4, 11),
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	ENET0_TXD3	= PINID(4, 12),
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	ENET0_RX_CLK	= PINID(4, 13),
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	ENET0_COL	= PINID(4, 14),
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	ENET0_CRS	= PINID(4, 15),
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	ENET_CLK	= PINID(4, 16),
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	JTAG_RTCK	= PINID(4, 20),
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	EMI_D00		= PINID(5, 0),
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	EMI_D01		= PINID(5, 1),
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	EMI_D02		= PINID(5, 2),
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	EMI_D03		= PINID(5, 3),
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	EMI_D04		= PINID(5, 4),
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	EMI_D05		= PINID(5, 5),
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	EMI_D06		= PINID(5, 6),
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	EMI_D07		= PINID(5, 7),
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	EMI_D08		= PINID(5, 8),
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	EMI_D09		= PINID(5, 9),
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	EMI_D10		= PINID(5, 10),
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	EMI_D11		= PINID(5, 11),
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	EMI_D12		= PINID(5, 12),
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	EMI_D13		= PINID(5, 13),
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	EMI_D14		= PINID(5, 14),
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	EMI_D15		= PINID(5, 15),
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	EMI_ODT0	= PINID(5, 16),
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	EMI_DQM0	= PINID(5, 17),
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	EMI_ODT1	= PINID(5, 18),
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	EMI_DQM1	= PINID(5, 19),
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	EMI_DDR_OPEN_FB	= PINID(5, 20),
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	EMI_CLK		= PINID(5, 21),
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	EMI_DQS0	= PINID(5, 22),
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	EMI_DQS1	= PINID(5, 23),
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	EMI_DDR_OPEN	= PINID(5, 26),
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	EMI_A00		= PINID(6, 0),
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	EMI_A01		= PINID(6, 1),
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	EMI_A02		= PINID(6, 2),
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	EMI_A03		= PINID(6, 3),
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	EMI_A04		= PINID(6, 4),
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	EMI_A05		= PINID(6, 5),
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	EMI_A06		= PINID(6, 6),
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	EMI_A07		= PINID(6, 7),
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	EMI_A08		= PINID(6, 8),
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	EMI_A09		= PINID(6, 9),
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	EMI_A10		= PINID(6, 10),
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	EMI_A11		= PINID(6, 11),
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	EMI_A12		= PINID(6, 12),
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	EMI_A13		= PINID(6, 13),
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	EMI_A14		= PINID(6, 14),
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	EMI_BA0		= PINID(6, 16),
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	EMI_BA1		= PINID(6, 17),
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	EMI_BA2		= PINID(6, 18),
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	EMI_CASN	= PINID(6, 19),
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	EMI_RASN	= PINID(6, 20),
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	EMI_WEN		= PINID(6, 21),
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	EMI_CE0N	= PINID(6, 22),
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	EMI_CE1N	= PINID(6, 23),
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	EMI_CKE		= PINID(6, 24),
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};
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static const struct pinctrl_pin_desc imx28_pins[] = {
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	MXS_PINCTRL_PIN(GPMI_D00),
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	MXS_PINCTRL_PIN(GPMI_D01),
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	MXS_PINCTRL_PIN(GPMI_D02),
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	MXS_PINCTRL_PIN(GPMI_D03),
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	MXS_PINCTRL_PIN(GPMI_D04),
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	MXS_PINCTRL_PIN(GPMI_D05),
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	MXS_PINCTRL_PIN(GPMI_D06),
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	MXS_PINCTRL_PIN(GPMI_D07),
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	MXS_PINCTRL_PIN(GPMI_CE0N),
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	MXS_PINCTRL_PIN(GPMI_CE1N),
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	MXS_PINCTRL_PIN(GPMI_CE2N),
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	MXS_PINCTRL_PIN(GPMI_CE3N),
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	MXS_PINCTRL_PIN(GPMI_RDY0),
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	MXS_PINCTRL_PIN(GPMI_RDY1),
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	MXS_PINCTRL_PIN(GPMI_RDY2),
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	MXS_PINCTRL_PIN(GPMI_RDY3),
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	MXS_PINCTRL_PIN(GPMI_RDN),
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	MXS_PINCTRL_PIN(GPMI_WRN),
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	MXS_PINCTRL_PIN(GPMI_ALE),
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	MXS_PINCTRL_PIN(GPMI_CLE),
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	MXS_PINCTRL_PIN(GPMI_RESETN),
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	MXS_PINCTRL_PIN(LCD_D00),
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	MXS_PINCTRL_PIN(LCD_D01),
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	MXS_PINCTRL_PIN(LCD_D02),
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	MXS_PINCTRL_PIN(LCD_D03),
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	MXS_PINCTRL_PIN(LCD_D04),
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	MXS_PINCTRL_PIN(LCD_D05),
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	MXS_PINCTRL_PIN(LCD_D06),
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	MXS_PINCTRL_PIN(LCD_D07),
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	MXS_PINCTRL_PIN(LCD_D08),
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	MXS_PINCTRL_PIN(LCD_D09),
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	MXS_PINCTRL_PIN(LCD_D10),
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	MXS_PINCTRL_PIN(LCD_D11),
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	MXS_PINCTRL_PIN(LCD_D12),
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	MXS_PINCTRL_PIN(LCD_D13),
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	MXS_PINCTRL_PIN(LCD_D14),
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	MXS_PINCTRL_PIN(LCD_D15),
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	MXS_PINCTRL_PIN(LCD_D16),
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	MXS_PINCTRL_PIN(LCD_D17),
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	MXS_PINCTRL_PIN(LCD_D18),
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	MXS_PINCTRL_PIN(LCD_D19),
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	MXS_PINCTRL_PIN(LCD_D20),
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	MXS_PINCTRL_PIN(LCD_D21),
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	MXS_PINCTRL_PIN(LCD_D22),
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	MXS_PINCTRL_PIN(LCD_D23),
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	MXS_PINCTRL_PIN(LCD_RD_E),
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	MXS_PINCTRL_PIN(LCD_WR_RWN),
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	MXS_PINCTRL_PIN(LCD_RS),
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	MXS_PINCTRL_PIN(LCD_CS),
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	MXS_PINCTRL_PIN(LCD_VSYNC),
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	MXS_PINCTRL_PIN(LCD_HSYNC),
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	MXS_PINCTRL_PIN(LCD_DOTCLK),
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	MXS_PINCTRL_PIN(LCD_ENABLE),
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	MXS_PINCTRL_PIN(SSP0_DATA0),
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	MXS_PINCTRL_PIN(SSP0_DATA1),
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	MXS_PINCTRL_PIN(SSP0_DATA2),
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	MXS_PINCTRL_PIN(SSP0_DATA3),
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	MXS_PINCTRL_PIN(SSP0_DATA4),
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	MXS_PINCTRL_PIN(SSP0_DATA5),
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	MXS_PINCTRL_PIN(SSP0_DATA6),
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	MXS_PINCTRL_PIN(SSP0_DATA7),
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	MXS_PINCTRL_PIN(SSP0_CMD),
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	MXS_PINCTRL_PIN(SSP0_DETECT),
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	MXS_PINCTRL_PIN(SSP0_SCK),
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	MXS_PINCTRL_PIN(SSP1_SCK),
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	MXS_PINCTRL_PIN(SSP1_CMD),
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	MXS_PINCTRL_PIN(SSP1_DATA0),
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	MXS_PINCTRL_PIN(SSP1_DATA3),
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	MXS_PINCTRL_PIN(SSP2_SCK),
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	MXS_PINCTRL_PIN(SSP2_MOSI),
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	MXS_PINCTRL_PIN(SSP2_MISO),
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	MXS_PINCTRL_PIN(SSP2_SS0),
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	MXS_PINCTRL_PIN(SSP2_SS1),
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	MXS_PINCTRL_PIN(SSP2_SS2),
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	MXS_PINCTRL_PIN(SSP3_SCK),
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	MXS_PINCTRL_PIN(SSP3_MOSI),
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	MXS_PINCTRL_PIN(SSP3_MISO),
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	MXS_PINCTRL_PIN(SSP3_SS0),
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	MXS_PINCTRL_PIN(AUART0_RX),
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	MXS_PINCTRL_PIN(AUART0_TX),
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	MXS_PINCTRL_PIN(AUART0_CTS),
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	MXS_PINCTRL_PIN(AUART0_RTS),
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	MXS_PINCTRL_PIN(AUART1_RX),
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	MXS_PINCTRL_PIN(AUART1_TX),
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	MXS_PINCTRL_PIN(AUART1_CTS),
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	MXS_PINCTRL_PIN(AUART1_RTS),
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	MXS_PINCTRL_PIN(AUART2_RX),
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	MXS_PINCTRL_PIN(AUART2_TX),
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	MXS_PINCTRL_PIN(AUART2_CTS),
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	MXS_PINCTRL_PIN(AUART2_RTS),
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	MXS_PINCTRL_PIN(AUART3_RX),
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	MXS_PINCTRL_PIN(AUART3_TX),
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	MXS_PINCTRL_PIN(AUART3_CTS),
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	MXS_PINCTRL_PIN(AUART3_RTS),
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	MXS_PINCTRL_PIN(PWM0),
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	MXS_PINCTRL_PIN(PWM1),
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	MXS_PINCTRL_PIN(PWM2),
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	MXS_PINCTRL_PIN(SAIF0_MCLK),
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	MXS_PINCTRL_PIN(SAIF0_LRCLK),
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	MXS_PINCTRL_PIN(SAIF0_BITCLK),
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	MXS_PINCTRL_PIN(SAIF0_SDATA0),
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	MXS_PINCTRL_PIN(I2C0_SCL),
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	MXS_PINCTRL_PIN(I2C0_SDA),
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	MXS_PINCTRL_PIN(SAIF1_SDATA0),
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	MXS_PINCTRL_PIN(SPDIF),
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	MXS_PINCTRL_PIN(PWM3),
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	MXS_PINCTRL_PIN(PWM4),
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	MXS_PINCTRL_PIN(LCD_RESET),
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	MXS_PINCTRL_PIN(ENET0_MDC),
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	MXS_PINCTRL_PIN(ENET0_MDIO),
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	MXS_PINCTRL_PIN(ENET0_RX_EN),
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	MXS_PINCTRL_PIN(ENET0_RXD0),
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	MXS_PINCTRL_PIN(ENET0_RXD1),
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	MXS_PINCTRL_PIN(ENET0_TX_CLK),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_TX_EN),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_TXD0),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_TXD1),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_RXD2),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_RXD3),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_TXD2),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_TXD3),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_RX_CLK),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_COL),
 | 
						|
	MXS_PINCTRL_PIN(ENET0_CRS),
 | 
						|
	MXS_PINCTRL_PIN(ENET_CLK),
 | 
						|
	MXS_PINCTRL_PIN(JTAG_RTCK),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D00),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D01),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D02),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D03),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D04),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D05),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D06),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D07),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D08),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D09),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D10),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D11),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D12),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D13),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D14),
 | 
						|
	MXS_PINCTRL_PIN(EMI_D15),
 | 
						|
	MXS_PINCTRL_PIN(EMI_ODT0),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DQM0),
 | 
						|
	MXS_PINCTRL_PIN(EMI_ODT1),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DQM1),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB),
 | 
						|
	MXS_PINCTRL_PIN(EMI_CLK),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DQS0),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DQS1),
 | 
						|
	MXS_PINCTRL_PIN(EMI_DDR_OPEN),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A00),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A01),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A02),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A03),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A04),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A05),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A06),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A07),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A08),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A09),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A10),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A11),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A12),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A13),
 | 
						|
	MXS_PINCTRL_PIN(EMI_A14),
 | 
						|
	MXS_PINCTRL_PIN(EMI_BA0),
 | 
						|
	MXS_PINCTRL_PIN(EMI_BA1),
 | 
						|
	MXS_PINCTRL_PIN(EMI_BA2),
 | 
						|
	MXS_PINCTRL_PIN(EMI_CASN),
 | 
						|
	MXS_PINCTRL_PIN(EMI_RASN),
 | 
						|
	MXS_PINCTRL_PIN(EMI_WEN),
 | 
						|
	MXS_PINCTRL_PIN(EMI_CE0N),
 | 
						|
	MXS_PINCTRL_PIN(EMI_CE1N),
 | 
						|
	MXS_PINCTRL_PIN(EMI_CKE),
 | 
						|
};
 | 
						|
 | 
						|
static struct mxs_regs imx28_regs = {
 | 
						|
	.muxsel = 0x100,
 | 
						|
	.drive = 0x300,
 | 
						|
	.pull = 0x600,
 | 
						|
};
 | 
						|
 | 
						|
static struct mxs_pinctrl_soc_data imx28_pinctrl_data = {
 | 
						|
	.regs = &imx28_regs,
 | 
						|
	.pins = imx28_pins,
 | 
						|
	.npins = ARRAY_SIZE(imx28_pins),
 | 
						|
};
 | 
						|
 | 
						|
static int imx28_pinctrl_probe(struct platform_device *pdev)
 | 
						|
{
 | 
						|
	return mxs_pinctrl_probe(pdev, &imx28_pinctrl_data);
 | 
						|
}
 | 
						|
 | 
						|
static struct of_device_id imx28_pinctrl_of_match[] = {
 | 
						|
	{ .compatible = "fsl,imx28-pinctrl", },
 | 
						|
	{ /* sentinel */ }
 | 
						|
};
 | 
						|
MODULE_DEVICE_TABLE(of, imx28_pinctrl_of_match);
 | 
						|
 | 
						|
static struct platform_driver imx28_pinctrl_driver = {
 | 
						|
	.driver = {
 | 
						|
		.name = "imx28-pinctrl",
 | 
						|
		.owner = THIS_MODULE,
 | 
						|
		.of_match_table = imx28_pinctrl_of_match,
 | 
						|
	},
 | 
						|
	.probe = imx28_pinctrl_probe,
 | 
						|
	.remove = mxs_pinctrl_remove,
 | 
						|
};
 | 
						|
 | 
						|
static int __init imx28_pinctrl_init(void)
 | 
						|
{
 | 
						|
	return platform_driver_register(&imx28_pinctrl_driver);
 | 
						|
}
 | 
						|
postcore_initcall(imx28_pinctrl_init);
 | 
						|
 | 
						|
static void __exit imx28_pinctrl_exit(void)
 | 
						|
{
 | 
						|
	platform_driver_unregister(&imx28_pinctrl_driver);
 | 
						|
}
 | 
						|
module_exit(imx28_pinctrl_exit);
 | 
						|
 | 
						|
MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 | 
						|
MODULE_DESCRIPTION("Freescale i.MX28 pinctrl driver");
 | 
						|
MODULE_LICENSE("GPL v2");
 |