 cad5cef62a
			
		
	
	
	cad5cef62a
	
	
	
		
			
			CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			342 lines
		
	
	
	
		
			6.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			342 lines
		
	
	
	
		
			6.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2006-2007 PA Semi, Inc
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|  *
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|  * Author: Olof Johansson, PA Semi
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|  *
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|  * Maintained by: Olof Johansson <olof@lixom.net>
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|  *
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|  * Based on drivers/net/fs_enet/mii-bitbang.c.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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|  */
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| 
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| #include <linux/io.h>
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| #include <linux/module.h>
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| #include <linux/types.h>
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| #include <linux/slab.h>
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| #include <linux/sched.h>
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| #include <linux/errno.h>
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| #include <linux/ioport.h>
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| #include <linux/interrupt.h>
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| #include <linux/phy.h>
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| #include <linux/of_mdio.h>
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| #include <linux/of_platform.h>
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| 
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| #define DELAY 1
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| 
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| static void __iomem *gpio_regs;
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| 
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| struct gpio_priv {
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| 	int mdc_pin;
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| 	int mdio_pin;
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| 	int mdio_irqs[PHY_MAX_ADDR];
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| };
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| 
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| #define MDC_PIN(bus)	(((struct gpio_priv *)bus->priv)->mdc_pin)
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| #define MDIO_PIN(bus)	(((struct gpio_priv *)bus->priv)->mdio_pin)
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| 
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| static inline void mdio_lo(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs+0x10, 1 << MDIO_PIN(bus));
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| }
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| 
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| static inline void mdio_hi(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs, 1 << MDIO_PIN(bus));
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| }
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| 
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| static inline void mdc_lo(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs+0x10, 1 << MDC_PIN(bus));
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| }
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| 
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| static inline void mdc_hi(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs, 1 << MDC_PIN(bus));
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| }
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| 
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| static inline void mdio_active(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs+0x20, (1 << MDC_PIN(bus)) | (1 << MDIO_PIN(bus)));
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| }
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| 
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| static inline void mdio_tristate(struct mii_bus *bus)
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| {
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| 	out_le32(gpio_regs+0x30, (1 << MDIO_PIN(bus)));
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| }
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| 
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| static inline int mdio_read(struct mii_bus *bus)
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| {
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| 	return !!(in_le32(gpio_regs+0x40) & (1 << MDIO_PIN(bus)));
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| }
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| 
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| static void clock_out(struct mii_bus *bus, int bit)
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| {
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| 	if (bit)
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| 		mdio_hi(bus);
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| 	else
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| 		mdio_lo(bus);
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| 	udelay(DELAY);
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 	mdc_lo(bus);
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| }
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| 
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| /* Utility to send the preamble, address, and register (common to read and write). */
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| static void bitbang_pre(struct mii_bus *bus, int read, u8 addr, u8 reg)
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| {
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| 	int i;
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| 
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| 	/* CFE uses a really long preamble (40 bits). We'll do the same. */
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| 	mdio_active(bus);
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| 	for (i = 0; i < 40; i++) {
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| 		clock_out(bus, 1);
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| 	}
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| 
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| 	/* send the start bit (01) and the read opcode (10) or write (10) */
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| 	clock_out(bus, 0);
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| 	clock_out(bus, 1);
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| 
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| 	clock_out(bus, read);
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| 	clock_out(bus, !read);
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| 
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| 	/* send the PHY address */
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| 	for (i = 0; i < 5; i++) {
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| 		clock_out(bus, (addr & 0x10) != 0);
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| 		addr <<= 1;
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| 	}
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| 
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| 	/* send the register address */
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| 	for (i = 0; i < 5; i++) {
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| 		clock_out(bus, (reg & 0x10) != 0);
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| 		reg <<= 1;
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| 	}
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| }
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| 
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| static int gpio_mdio_read(struct mii_bus *bus, int phy_id, int location)
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| {
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| 	u16 rdreg;
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| 	int ret, i;
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| 	u8 addr = phy_id & 0xff;
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| 	u8 reg = location & 0xff;
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| 
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| 	bitbang_pre(bus, 1, addr, reg);
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| 
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| 	/* tri-state our MDIO I/O pin so we can read */
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| 	mdio_tristate(bus);
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| 	udelay(DELAY);
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 	mdc_lo(bus);
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| 
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| 	/* read 16 bits of register data, MSB first */
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| 	rdreg = 0;
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| 	for (i = 0; i < 16; i++) {
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| 		mdc_lo(bus);
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| 		udelay(DELAY);
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| 		mdc_hi(bus);
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| 		udelay(DELAY);
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| 		mdc_lo(bus);
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| 		udelay(DELAY);
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| 		rdreg <<= 1;
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| 		rdreg |= mdio_read(bus);
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| 	}
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| 
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 	mdc_lo(bus);
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| 	udelay(DELAY);
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| 
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| 	ret = rdreg;
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| 
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| 	return ret;
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| }
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| 
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| static int gpio_mdio_write(struct mii_bus *bus, int phy_id, int location, u16 val)
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| {
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| 	int i;
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| 
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| 	u8 addr = phy_id & 0xff;
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| 	u8 reg = location & 0xff;
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| 	u16 value = val & 0xffff;
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| 
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| 	bitbang_pre(bus, 0, addr, reg);
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| 
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| 	/* send the turnaround (10) */
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| 	mdc_lo(bus);
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| 	mdio_hi(bus);
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| 	udelay(DELAY);
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 	mdc_lo(bus);
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| 	mdio_lo(bus);
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| 	udelay(DELAY);
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 
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| 	/* write 16 bits of register data, MSB first */
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| 	for (i = 0; i < 16; i++) {
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| 		mdc_lo(bus);
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| 		if (value & 0x8000)
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| 			mdio_hi(bus);
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| 		else
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| 			mdio_lo(bus);
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| 		udelay(DELAY);
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| 		mdc_hi(bus);
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| 		udelay(DELAY);
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| 		value <<= 1;
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| 	}
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| 
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| 	/*
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| 	 * Tri-state the MDIO line.
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| 	 */
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| 	mdio_tristate(bus);
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| 	mdc_lo(bus);
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| 	udelay(DELAY);
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| 	mdc_hi(bus);
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| 	udelay(DELAY);
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| 	return 0;
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| }
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| 
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| static int gpio_mdio_reset(struct mii_bus *bus)
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| {
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| 	/*nothing here - dunno how to reset it*/
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| 	return 0;
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| }
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| 
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| 
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| static int gpio_mdio_probe(struct platform_device *ofdev)
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| {
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| 	struct device *dev = &ofdev->dev;
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| 	struct device_node *np = ofdev->dev.of_node;
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| 	struct mii_bus *new_bus;
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| 	struct gpio_priv *priv;
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| 	const unsigned int *prop;
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| 	int err;
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| 
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| 	err = -ENOMEM;
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| 	priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
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| 	if (!priv)
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| 		goto out;
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| 
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| 	new_bus = mdiobus_alloc();
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| 
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| 	if (!new_bus)
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| 		goto out_free_priv;
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| 
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| 	new_bus->name = "pasemi gpio mdio bus";
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| 	new_bus->read = &gpio_mdio_read;
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| 	new_bus->write = &gpio_mdio_write;
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| 	new_bus->reset = &gpio_mdio_reset;
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| 
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| 	prop = of_get_property(np, "reg", NULL);
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| 	snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", *prop);
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| 	new_bus->priv = priv;
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| 
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| 	new_bus->irq = priv->mdio_irqs;
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| 
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| 	prop = of_get_property(np, "mdc-pin", NULL);
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| 	priv->mdc_pin = *prop;
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| 
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| 	prop = of_get_property(np, "mdio-pin", NULL);
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| 	priv->mdio_pin = *prop;
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| 
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| 	new_bus->parent = dev;
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| 	dev_set_drvdata(dev, new_bus);
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| 
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| 	err = of_mdiobus_register(new_bus, np);
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| 
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| 	if (err != 0) {
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| 		printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
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| 				new_bus->name, err);
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| 		goto out_free_irq;
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| 	}
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| 
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| 	return 0;
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| 
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| out_free_irq:
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| 	kfree(new_bus);
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| out_free_priv:
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| 	kfree(priv);
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| out:
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| 	return err;
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| }
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| 
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| 
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| static int gpio_mdio_remove(struct platform_device *dev)
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| {
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| 	struct mii_bus *bus = dev_get_drvdata(&dev->dev);
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| 
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| 	mdiobus_unregister(bus);
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| 
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| 	dev_set_drvdata(&dev->dev, NULL);
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| 
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| 	kfree(bus->priv);
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| 	bus->priv = NULL;
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| 	mdiobus_free(bus);
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| 
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| 	return 0;
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| }
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| 
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| static struct of_device_id gpio_mdio_match[] =
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| {
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| 	{
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| 		.compatible      = "gpio-mdio",
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| 	},
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| 	{},
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| };
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| MODULE_DEVICE_TABLE(of, gpio_mdio_match);
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| 
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| static struct platform_driver gpio_mdio_driver =
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| {
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| 	.probe		= gpio_mdio_probe,
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| 	.remove		= gpio_mdio_remove,
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| 	.driver = {
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| 		.name = "gpio-mdio-bitbang",
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| 		.owner = THIS_MODULE,
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| 		.of_match_table = gpio_mdio_match,
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| 	},
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| };
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| 
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| int gpio_mdio_init(void)
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| {
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| 	struct device_node *np;
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| 
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| 	np = of_find_compatible_node(NULL, NULL, "1682m-gpio");
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| 	if (!np)
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| 		np = of_find_compatible_node(NULL, NULL,
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| 					     "pasemi,pwrficient-gpio");
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| 	if (!np)
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| 		return -ENODEV;
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| 	gpio_regs = of_iomap(np, 0);
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| 	of_node_put(np);
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| 
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| 	if (!gpio_regs)
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| 		return -ENODEV;
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| 
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| 	return platform_driver_register(&gpio_mdio_driver);
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| }
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| module_init(gpio_mdio_init);
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| 
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| void gpio_mdio_exit(void)
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| {
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| 	platform_driver_unregister(&gpio_mdio_driver);
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| 	if (gpio_regs)
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| 		iounmap(gpio_regs);
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| }
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| module_exit(gpio_mdio_exit);
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| 
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| MODULE_LICENSE("GPL");
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| MODULE_AUTHOR("Olof Johansson <olof@lixom.net>");
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| MODULE_DESCRIPTION("Driver for MDIO over GPIO on PA Semi PWRficient-based boards");
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