292b293cee
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
39 lines
705 B
ArmAsm
39 lines
705 B
ArmAsm
#include <asm/assembler.h>
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/*
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* Interrupt handling. Preserves r7, r8, r9
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*/
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.macro arch_irq_handler_default
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get_irqnr_preamble r6, lr
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1: get_irqnr_and_base r0, r2, r6, lr
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movne r1, sp
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@
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@ routine called with r0 = irq number, r1 = struct pt_regs *
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@
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adrne lr, BSYM(1b)
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bne asm_do_IRQ
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#ifdef CONFIG_SMP
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/*
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* XXX
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*
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* this macro assumes that irqstat (r2) and base (r6) are
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* preserved from get_irqnr_and_base above
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*/
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ALT_SMP(test_for_ipi r0, r2, r6, lr)
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ALT_UP_B(9997f)
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movne r1, sp
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adrne lr, BSYM(1b)
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bne do_IPI
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#endif
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9997:
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.endm
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.macro arch_irq_handler, symbol_name
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.align 5
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.global \symbol_name
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\symbol_name:
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mov r8, lr
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arch_irq_handler_default
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mov pc, r8
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.endm
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