3049918660
* Number of (i|d)cache ways can be retrieved from BCRs and hence no need to cross check with with built-in constants * Use of IS_ENABLED() to check for a Kconfig option * is_not_cache_aligned() not used anymore Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARC_ASM_CACHE_H
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#define __ARC_ASM_CACHE_H
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/* In case $$ not config, setup a dummy number for rest of kernel */
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#ifndef CONFIG_ARC_CACHE_LINE_SHIFT
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#define L1_CACHE_SHIFT 6
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#else
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#define L1_CACHE_SHIFT CONFIG_ARC_CACHE_LINE_SHIFT
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#endif
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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/* For a rare case where customers have differently config I/D */
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#define ARC_ICACHE_LINE_LEN L1_CACHE_BYTES
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#define ARC_DCACHE_LINE_LEN L1_CACHE_BYTES
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#define ICACHE_LINE_MASK (~(ARC_ICACHE_LINE_LEN - 1))
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#define DCACHE_LINE_MASK (~(ARC_DCACHE_LINE_LEN - 1))
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/*
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* ARC700 doesn't cache any access in top 256M.
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* Ideal for wiring memory mapped peripherals as we don't need to do
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* explicit uncached accesses (LD.di/ST.di) hence more portable drivers
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*/
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#define ARC_UNCACHED_ADDR_SPACE 0xc0000000
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#ifndef __ASSEMBLY__
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/* Uncached access macros */
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#define arc_read_uncached_32(ptr) \
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({ \
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unsigned int __ret; \
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__asm__ __volatile__( \
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" ld.di %0, [%1] \n" \
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: "=r"(__ret) \
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: "r"(ptr)); \
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__ret; \
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})
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#define arc_write_uncached_32(ptr, data)\
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({ \
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__asm__ __volatile__( \
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" st.di %0, [%1] \n" \
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: \
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: "r"(data), "r"(ptr)); \
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})
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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extern void arc_cache_init(void);
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extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
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extern void __init read_decode_cache_bcr(void);
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_CACHE_H */
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