777e61ea40
Previously we assumed that PCIe Root Ports and Downstream Ports had Links on their secondary side. That is true in most systems, but it is possible to connect a switch with either an Upstream or a Downstream Port leading downstream. Instead of relying on the component type to identify devices that have links leading downstream, use the "dev->has_secondary_link" field. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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| .. | ||
| aer_inject.c | ||
| aerdrv.c | ||
| aerdrv.h | ||
| aerdrv_acpi.c | ||
| aerdrv_core.c | ||
| aerdrv_errprint.c | ||
| ecrc.c | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||