 48bc556210
			
		
	
	
	48bc556210
	
	
	
		
			
			On the Intel MID devices SCU commands are issued to manage power off and the like. We need to issue different ones for non-Lincroft based devices. Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
		
			
				
	
	
		
			73 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			73 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _ASM_X86_INTEL_SCU_IPC_H_
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| #define  _ASM_X86_INTEL_SCU_IPC_H_
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| 
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| #include <linux/notifier.h>
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| 
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| #define IPCMSG_WARM_RESET	0xF0
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| #define IPCMSG_COLD_RESET	0xF1
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| #define IPCMSG_SOFT_RESET	0xF2
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| #define IPCMSG_COLD_BOOT	0xF3
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| 
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| #define IPCMSG_VRTC		0xFA	 /* Set vRTC device */
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| 	/* Command id associated with message IPCMSG_VRTC */
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| 	#define IPC_CMD_VRTC_SETTIME      1 /* Set time */
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| 	#define IPC_CMD_VRTC_SETALARM     2 /* Set alarm */
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| 
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| /* Read single register */
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| int intel_scu_ipc_ioread8(u16 addr, u8 *data);
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| 
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| /* Read two sequential registers */
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| int intel_scu_ipc_ioread16(u16 addr, u16 *data);
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| 
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| /* Read four sequential registers */
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| int intel_scu_ipc_ioread32(u16 addr, u32 *data);
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| 
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| /* Read a vector */
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| int intel_scu_ipc_readv(u16 *addr, u8 *data, int len);
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| 
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| /* Write single register */
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| int intel_scu_ipc_iowrite8(u16 addr, u8 data);
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| 
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| /* Write two sequential registers */
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| int intel_scu_ipc_iowrite16(u16 addr, u16 data);
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| 
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| /* Write four sequential registers */
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| int intel_scu_ipc_iowrite32(u16 addr, u32 data);
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| 
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| /* Write a vector */
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| int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
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| 
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| /* Update single register based on the mask */
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| int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
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| 
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| /* Issue commands to the SCU with or without data */
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| int intel_scu_ipc_simple_command(int cmd, int sub);
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| int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
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| 							u32 *out, int outlen);
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| /* I2C control api */
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| int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data);
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| 
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| /* Update FW version */
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| int intel_scu_ipc_fw_update(u8 *buffer, u32 length);
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| 
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| extern struct blocking_notifier_head intel_scu_notifier;
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| 
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| static inline void intel_scu_notifier_add(struct notifier_block *nb)
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| {
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| 	blocking_notifier_chain_register(&intel_scu_notifier, nb);
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| }
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| 
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| static inline void intel_scu_notifier_remove(struct notifier_block *nb)
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| {
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| 	blocking_notifier_chain_unregister(&intel_scu_notifier, nb);
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| }
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| 
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| static inline int intel_scu_notifier_post(unsigned long v, void *p)
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| {
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| 	return blocking_notifier_call_chain(&intel_scu_notifier, v, p);
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| }
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| 
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| #define		SCU_AVAILABLE		1
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| #define		SCU_DOWN		2
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| 
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| #endif
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