 50f2de6126
			
		
	
	
	50f2de6126
	
	
	
		
			
			It moves a bunch of header files included in hardware.h and itself from mach-imx/include/mach to mach-imx, and updates users to include hardware.h rather than mach/hardware.h. The files in mach-imx/devices will need to include "../hardware.h". Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
		
			
				
	
	
		
			74 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
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|  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version 2
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|  * of the License, or (at your option) any later version.
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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|  * MA 02110-1301, USA.
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|  */
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| 
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| /*
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|  * i.MX27 specific CPU detection code
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|  */
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| 
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| #include <linux/io.h>
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| #include <linux/module.h>
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| 
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| #include "hardware.h"
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| 
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| static int mx27_cpu_rev = -1;
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| static int mx27_cpu_partnumber;
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| 
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| #define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
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| 
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| static int mx27_read_cpu_rev(void)
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| {
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| 	u32 val;
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| 	/*
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| 	 * now we have access to the IO registers. As we need
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| 	 * the silicon revision very early we read it here to
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| 	 * avoid any further hooks
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| 	*/
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| 	val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
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| 				+ SYS_CHIP_ID));
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| 
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| 	mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
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| 
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| 	switch (val >> 28) {
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| 	case 0:
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| 		return IMX_CHIP_REVISION_1_0;
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| 	case 1:
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| 		return IMX_CHIP_REVISION_2_0;
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| 	case 2:
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| 		return IMX_CHIP_REVISION_2_1;
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| 	default:
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| 		return IMX_CHIP_REVISION_UNKNOWN;
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| 	}
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| }
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| 
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| /*
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|  * Returns:
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|  *	the silicon revision of the cpu
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|  *	-EINVAL - not a mx27
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|  */
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| int mx27_revision(void)
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| {
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| 	if (mx27_cpu_rev == -1)
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| 		mx27_cpu_rev = mx27_read_cpu_rev();
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| 
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| 	if (mx27_cpu_partnumber != 0x8821)
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| 		return -EINVAL;
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| 
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| 	return mx27_cpu_rev;
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| }
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| EXPORT_SYMBOL(mx27_revision);
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