This updates ath5k to calibrate the noise floor similar to the way it is done in the madwifi hal and ath9k. Of note: - we start NF measurement at the same time as AGC calibration, but do not actually read the value until the periodic (long) calibration - we keep a history of the last few values read and write the median back to the hardware for CCA - we do not complain if NF calibration isn't complete, instead we keep the last read value. Signed-off-by: Bob Copeland <me@bobcopeland.com> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
		
			
				
	
	
		
			362 lines
		
	
	
	
		
			9.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			362 lines
		
	
	
	
		
			9.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
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 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
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 *
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 * Permission to use, copy, modify, and distribute this software for any
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 * purpose with or without fee is hereby granted, provided that the above
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 * copyright notice and this permission notice appear in all copies.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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 *
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 */
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/*************************************\
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* Attach/Detach Functions and helpers *
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\*************************************/
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#include <linux/pci.h>
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#include "ath5k.h"
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#include "reg.h"
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#include "debug.h"
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#include "base.h"
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/**
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 * ath5k_hw_post - Power On Self Test helper function
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 *
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 * @ah: The &struct ath5k_hw
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 */
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static int ath5k_hw_post(struct ath5k_hw *ah)
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{
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	static const u32 static_pattern[4] = {
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		0x55555555,	0xaaaaaaaa,
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		0x66666666,	0x99999999
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	};
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	static const u16 regs[2] = { AR5K_STA_ID0, AR5K_PHY(8) };
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	int i, c;
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	u16 cur_reg;
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	u32 var_pattern;
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	u32 init_val;
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	u32 cur_val;
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	for (c = 0; c < 2; c++) {
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		cur_reg = regs[c];
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		/* Save previous value */
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		init_val = ath5k_hw_reg_read(ah, cur_reg);
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		for (i = 0; i < 256; i++) {
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			var_pattern = i << 16 | i;
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			ath5k_hw_reg_write(ah, var_pattern, cur_reg);
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			cur_val = ath5k_hw_reg_read(ah, cur_reg);
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			if (cur_val != var_pattern) {
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				ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
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				return -EAGAIN;
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			}
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			/* Found on ndiswrapper dumps */
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			var_pattern = 0x0039080f;
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			ath5k_hw_reg_write(ah, var_pattern, cur_reg);
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		}
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		for (i = 0; i < 4; i++) {
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			var_pattern = static_pattern[i];
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			ath5k_hw_reg_write(ah, var_pattern, cur_reg);
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			cur_val = ath5k_hw_reg_read(ah, cur_reg);
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			if (cur_val != var_pattern) {
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				ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
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				return -EAGAIN;
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			}
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			/* Found on ndiswrapper dumps */
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			var_pattern = 0x003b080f;
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			ath5k_hw_reg_write(ah, var_pattern, cur_reg);
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		}
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		/* Restore previous value */
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		ath5k_hw_reg_write(ah, init_val, cur_reg);
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	}
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	return 0;
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}
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/**
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 * ath5k_hw_attach - Check if hw is supported and init the needed structs
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 *
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 * @sc: The &struct ath5k_softc we got from the driver's attach function
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 *
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 * Check if the device is supported, perform a POST and initialize the needed
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 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
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 * -ENODEV if the device is not supported or prints an error msg if something
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 * else went wrong.
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 */
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int ath5k_hw_attach(struct ath5k_softc *sc)
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{
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	struct ath5k_hw *ah = sc->ah;
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	struct ath_common *common = ath5k_hw_common(ah);
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	struct pci_dev *pdev = sc->pdev;
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	struct ath5k_eeprom_info *ee;
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	int ret;
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	u32 srev;
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	/*
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	 * HW information
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	 */
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	ah->ah_op_mode = NL80211_IFTYPE_STATION;
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	ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
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	ah->ah_turbo = false;
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	ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
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	ah->ah_imr = 0;
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	ah->ah_atim_window = 0;
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	ah->ah_aifs = AR5K_TUNE_AIFS;
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	ah->ah_cw_min = AR5K_TUNE_CWMIN;
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	ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
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	ah->ah_software_retry = false;
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	/*
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	 * Find the mac version
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	 */
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	srev = ath5k_hw_reg_read(ah, AR5K_SREV);
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	if (srev < AR5K_SREV_AR5311)
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		ah->ah_version = AR5K_AR5210;
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	else if (srev < AR5K_SREV_AR5212)
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		ah->ah_version = AR5K_AR5211;
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	else
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		ah->ah_version = AR5K_AR5212;
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	/*Fill the ath5k_hw struct with the needed functions*/
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	ret = ath5k_hw_init_desc_functions(ah);
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	if (ret)
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		goto err_free;
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	/* Bring device out of sleep and reset it's units */
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	ret = ath5k_hw_nic_wakeup(ah, 0, true);
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	if (ret)
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		goto err_free;
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	/* Get MAC, PHY and RADIO revisions */
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	ah->ah_mac_srev = srev;
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	ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER);
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	ah->ah_mac_revision = AR5K_REG_MS(srev, AR5K_SREV_REV);
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	ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
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			0xffffffff;
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	ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
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			CHANNEL_5GHZ);
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	ah->ah_phy = AR5K_PHY(0);
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	/* Try to identify radio chip based on it's srev */
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	switch (ah->ah_radio_5ghz_revision & 0xf0) {
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	case AR5K_SREV_RAD_5111:
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		ah->ah_radio = AR5K_RF5111;
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		ah->ah_single_chip = false;
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		ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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							CHANNEL_2GHZ);
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		break;
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	case AR5K_SREV_RAD_5112:
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	case AR5K_SREV_RAD_2112:
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		ah->ah_radio = AR5K_RF5112;
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		ah->ah_single_chip = false;
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		ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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							CHANNEL_2GHZ);
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		break;
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	case AR5K_SREV_RAD_2413:
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		ah->ah_radio = AR5K_RF2413;
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		ah->ah_single_chip = true;
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		break;
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	case AR5K_SREV_RAD_5413:
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		ah->ah_radio = AR5K_RF5413;
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		ah->ah_single_chip = true;
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		break;
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	case AR5K_SREV_RAD_2316:
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		ah->ah_radio = AR5K_RF2316;
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		ah->ah_single_chip = true;
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		break;
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	case AR5K_SREV_RAD_2317:
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		ah->ah_radio = AR5K_RF2317;
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		ah->ah_single_chip = true;
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		break;
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	case AR5K_SREV_RAD_5424:
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		if (ah->ah_mac_version == AR5K_SREV_AR2425 ||
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		ah->ah_mac_version == AR5K_SREV_AR2417){
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			ah->ah_radio = AR5K_RF2425;
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			ah->ah_single_chip = true;
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		} else {
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			ah->ah_radio = AR5K_RF5413;
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			ah->ah_single_chip = true;
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		}
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		break;
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	default:
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		/* Identify radio based on mac/phy srev */
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		if (ah->ah_version == AR5K_AR5210) {
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			ah->ah_radio = AR5K_RF5110;
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			ah->ah_single_chip = false;
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		} else if (ah->ah_version == AR5K_AR5211) {
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			ah->ah_radio = AR5K_RF5111;
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			ah->ah_single_chip = false;
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			ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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								CHANNEL_2GHZ);
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		} else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
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		ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
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		ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
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			ah->ah_radio = AR5K_RF2425;
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			ah->ah_single_chip = true;
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			ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2425;
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		} else if (srev == AR5K_SREV_AR5213A &&
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		ah->ah_phy_revision == AR5K_SREV_PHY_5212B) {
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			ah->ah_radio = AR5K_RF5112;
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			ah->ah_single_chip = false;
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			ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5112B;
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		} else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4)) {
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			ah->ah_radio = AR5K_RF2316;
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			ah->ah_single_chip = true;
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			ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2316;
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		} else if (ah->ah_mac_version == (AR5K_SREV_AR5414 >> 4) ||
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		ah->ah_phy_revision == AR5K_SREV_PHY_5413) {
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			ah->ah_radio = AR5K_RF5413;
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			ah->ah_single_chip = true;
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			ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5413;
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		} else if (ah->ah_mac_version == (AR5K_SREV_AR2414 >> 4) ||
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		ah->ah_phy_revision == AR5K_SREV_PHY_2413) {
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			ah->ah_radio = AR5K_RF2413;
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			ah->ah_single_chip = true;
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			ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
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		} else {
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			ATH5K_ERR(sc, "Couldn't identify radio revision.\n");
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			ret = -ENODEV;
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			goto err_free;
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		}
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	}
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	/* Return on unsuported chips (unsupported eeprom etc) */
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	if ((srev >= AR5K_SREV_AR5416) &&
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	(srev < AR5K_SREV_AR2425)) {
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		ATH5K_ERR(sc, "Device not yet supported.\n");
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		ret = -ENODEV;
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		goto err_free;
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	}
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	/*
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	 * POST
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	 */
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	ret = ath5k_hw_post(ah);
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	if (ret)
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		goto err_free;
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	/* Enable pci core retry fix on Hainan (5213A) and later chips */
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	if (srev >= AR5K_SREV_AR5213A)
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		AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_RETRY_FIX);
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	/*
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	 * Get card capabilities, calibration values etc
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	 * TODO: EEPROM work
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	 */
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	ret = ath5k_eeprom_init(ah);
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	if (ret) {
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		ATH5K_ERR(sc, "unable to init EEPROM\n");
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		goto err_free;
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	}
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	ee = &ah->ah_capabilities.cap_eeprom;
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	/*
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	 * Write PCI-E power save settings
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	 */
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	if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) {
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		ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES);
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		ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES);
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		/* Shut off RX when elecidle is asserted */
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		ath5k_hw_reg_write(ah, 0x28000039, AR5K_PCIE_SERDES);
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		ath5k_hw_reg_write(ah, 0x53160824, AR5K_PCIE_SERDES);
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		/* If serdes programing is enabled, increase PCI-E
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		 * tx power for systems with long trace from host
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		 * to minicard connector. */
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		if (ee->ee_serdes)
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			ath5k_hw_reg_write(ah, 0xe5980579, AR5K_PCIE_SERDES);
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		else
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			ath5k_hw_reg_write(ah, 0xf6800579, AR5K_PCIE_SERDES);
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		/* Shut off PLL and CLKREQ active in L1 */
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		ath5k_hw_reg_write(ah, 0x001defff, AR5K_PCIE_SERDES);
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		/* Preserve other settings */
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		ath5k_hw_reg_write(ah, 0x1aaabe40, AR5K_PCIE_SERDES);
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		ath5k_hw_reg_write(ah, 0xbe105554, AR5K_PCIE_SERDES);
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		ath5k_hw_reg_write(ah, 0x000e3007, AR5K_PCIE_SERDES);
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		/* Reset SERDES to load new settings */
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		ath5k_hw_reg_write(ah, 0x00000000, AR5K_PCIE_SERDES_RESET);
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		mdelay(1);
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	}
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 | 
						|
	/* Get misc capabilities */
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						|
	ret = ath5k_hw_set_capabilities(ah);
 | 
						|
	if (ret) {
 | 
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		ATH5K_ERR(sc, "unable to get device capabilities: 0x%04x\n",
 | 
						|
			sc->pdev->device);
 | 
						|
		goto err_free;
 | 
						|
	}
 | 
						|
 | 
						|
	/* Crypto settings */
 | 
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	ah->ah_aes_support = srev >= AR5K_SREV_AR5212_V4 &&
 | 
						|
		(ee->ee_version >= AR5K_EEPROM_VERSION_5_0 &&
 | 
						|
		 !AR5K_EEPROM_AES_DIS(ee->ee_misc5));
 | 
						|
 | 
						|
	if (srev >= AR5K_SREV_AR2414) {
 | 
						|
		ah->ah_combined_mic = true;
 | 
						|
		AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
 | 
						|
			AR5K_MISC_MODE_COMBINED_MIC);
 | 
						|
	}
 | 
						|
 | 
						|
	/* MAC address is cleared until add_interface */
 | 
						|
	ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){});
 | 
						|
 | 
						|
	/* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
 | 
						|
	memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
 | 
						|
	ath5k_hw_set_associd(ah);
 | 
						|
	ath5k_hw_set_opmode(ah);
 | 
						|
 | 
						|
	ath5k_hw_rfgain_opt_init(ah);
 | 
						|
 | 
						|
	ath5k_hw_init_nfcal_hist(ah);
 | 
						|
 | 
						|
	/* turn on HW LEDs */
 | 
						|
	ath5k_hw_set_ledstate(ah, AR5K_LED_INIT);
 | 
						|
 | 
						|
	return 0;
 | 
						|
err_free:
 | 
						|
	kfree(ah);
 | 
						|
	return ret;
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * ath5k_hw_detach - Free the ath5k_hw struct
 | 
						|
 *
 | 
						|
 * @ah: The &struct ath5k_hw
 | 
						|
 */
 | 
						|
void ath5k_hw_detach(struct ath5k_hw *ah)
 | 
						|
{
 | 
						|
	ATH5K_TRACE(ah->ah_sc);
 | 
						|
 | 
						|
	__set_bit(ATH_STAT_INVALID, ah->ah_sc->status);
 | 
						|
 | 
						|
	if (ah->ah_rf_banks != NULL)
 | 
						|
		kfree(ah->ah_rf_banks);
 | 
						|
 | 
						|
	ath5k_eeprom_detach(ah);
 | 
						|
 | 
						|
	/* assume interrupts are down */
 | 
						|
}
 |