 4712fff9be
			
		
	
	
	4712fff9be
	
	
	
		
			
			These are all powerpc specific drivers. res.start in fsl_elbc_nand.c needs to be cast since it may be either 32 or 64 bit. Thanks to Scott Wood for noticing. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> call_edac bits in particular Acked-by: Olof Johansson <olof@lixom.net> pasemi_nand peices Acked-by: Scott Wood <scottwood@freescale.com> fsl_elbc fixes Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
		
			
				
	
	
		
			244 lines
		
	
	
	
		
			5.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			244 lines
		
	
	
	
		
			5.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2006-2007 PA Semi, Inc
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|  *
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|  * Author: Egor Martovetsky <egor@pasemi.com>
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|  * Maintained by: Olof Johansson <olof@lixom.net>
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|  *
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|  * Driver for the PWRficient onchip NAND flash interface
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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|  */
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| 
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| #undef DEBUG
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| 
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| #include <linux/slab.h>
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| #include <linux/init.h>
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| #include <linux/module.h>
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/nand.h>
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| #include <linux/mtd/nand_ecc.h>
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| #include <linux/of_platform.h>
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| #include <linux/platform_device.h>
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| #include <linux/pci.h>
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| 
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| #include <asm/io.h>
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| 
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| #define LBICTRL_LPCCTL_NR		0x00004000
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| #define CLE_PIN_CTL			15
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| #define ALE_PIN_CTL			14
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| 
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| static unsigned int lpcctl;
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| static struct mtd_info *pasemi_nand_mtd;
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| static const char driver_name[] = "pasemi-nand";
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| 
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| static void pasemi_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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| {
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| 	struct nand_chip *chip = mtd->priv;
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| 
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| 	while (len > 0x800) {
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| 		memcpy_fromio(buf, chip->IO_ADDR_R, 0x800);
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| 		buf += 0x800;
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| 		len -= 0x800;
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| 	}
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| 	memcpy_fromio(buf, chip->IO_ADDR_R, len);
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| }
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| 
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| static void pasemi_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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| {
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| 	struct nand_chip *chip = mtd->priv;
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| 
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| 	while (len > 0x800) {
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| 		memcpy_toio(chip->IO_ADDR_R, buf, 0x800);
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| 		buf += 0x800;
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| 		len -= 0x800;
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| 	}
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| 	memcpy_toio(chip->IO_ADDR_R, buf, len);
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| }
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| 
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| static void pasemi_hwcontrol(struct mtd_info *mtd, int cmd,
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| 			     unsigned int ctrl)
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| {
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| 	struct nand_chip *chip = mtd->priv;
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| 
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| 	if (cmd == NAND_CMD_NONE)
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| 		return;
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| 
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| 	if (ctrl & NAND_CLE)
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| 		out_8(chip->IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
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| 	else
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| 		out_8(chip->IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
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| 
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| 	/* Push out posted writes */
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| 	eieio();
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| 	inl(lpcctl);
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| }
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| 
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| int pasemi_device_ready(struct mtd_info *mtd)
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| {
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| 	return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
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| }
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| 
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| static int __devinit pasemi_nand_probe(struct of_device *ofdev,
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| 				      const struct of_device_id *match)
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| {
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| 	struct pci_dev *pdev;
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| 	struct device_node *np = ofdev->node;
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| 	struct resource res;
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| 	struct nand_chip *chip;
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| 	int err = 0;
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| 
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| 	err = of_address_to_resource(np, 0, &res);
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| 
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| 	if (err)
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| 		return -EINVAL;
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| 
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| 	/* We only support one device at the moment */
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| 	if (pasemi_nand_mtd)
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| 		return -ENODEV;
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| 
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| 	pr_debug("pasemi_nand at %llx-%llx\n", res.start, res.end);
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| 
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| 	/* Allocate memory for MTD device structure and private data */
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| 	pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) +
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| 				  sizeof(struct nand_chip), GFP_KERNEL);
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| 	if (!pasemi_nand_mtd) {
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| 		printk(KERN_WARNING
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| 		       "Unable to allocate PASEMI NAND MTD device structure\n");
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| 		err = -ENOMEM;
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| 		goto out;
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| 	}
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| 
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| 	/* Get pointer to private data */
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| 	chip = (struct nand_chip *)&pasemi_nand_mtd[1];
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| 
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| 	/* Link the private data with the MTD structure */
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| 	pasemi_nand_mtd->priv = chip;
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| 	pasemi_nand_mtd->owner = THIS_MODULE;
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| 
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| 	chip->IO_ADDR_R = of_iomap(np, 0);
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| 	chip->IO_ADDR_W = chip->IO_ADDR_R;
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| 
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| 	if (!chip->IO_ADDR_R) {
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| 		err = -EIO;
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| 		goto out_mtd;
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| 	}
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| 
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| 	pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
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| 	if (!pdev) {
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| 		err = -ENODEV;
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| 		goto out_ior;
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| 	}
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| 
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| 	lpcctl = pci_resource_start(pdev, 0);
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| 	pci_dev_put(pdev);
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| 
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| 	if (!request_region(lpcctl, 4, driver_name)) {
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| 		err = -EBUSY;
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| 		goto out_ior;
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| 	}
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| 
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| 	chip->cmd_ctrl = pasemi_hwcontrol;
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| 	chip->dev_ready = pasemi_device_ready;
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| 	chip->read_buf = pasemi_read_buf;
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| 	chip->write_buf = pasemi_write_buf;
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| 	chip->chip_delay = 0;
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| 	chip->ecc.mode = NAND_ECC_SOFT;
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| 
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| 	/* Enable the following for a flash based bad block table */
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| 	chip->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
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| 
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| 	/* Scan to find existance of the device */
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| 	if (nand_scan(pasemi_nand_mtd, 1)) {
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| 		err = -ENXIO;
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| 		goto out_lpc;
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| 	}
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| 
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| 	if (add_mtd_device(pasemi_nand_mtd)) {
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| 		printk(KERN_ERR "pasemi_nand: Unable to register MTD device\n");
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| 		err = -ENODEV;
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| 		goto out_lpc;
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| 	}
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| 
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| 	printk(KERN_INFO "PA Semi NAND flash at %08llx, control at I/O %x\n",
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| 	       res.start, lpcctl);
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| 
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| 	return 0;
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| 
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|  out_lpc:
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| 	release_region(lpcctl, 4);
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|  out_ior:
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| 	iounmap(chip->IO_ADDR_R);
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|  out_mtd:
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| 	kfree(pasemi_nand_mtd);
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|  out:
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| 	return err;
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| }
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| 
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| static int __devexit pasemi_nand_remove(struct of_device *ofdev)
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| {
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| 	struct nand_chip *chip;
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| 
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| 	if (!pasemi_nand_mtd)
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| 		return 0;
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| 
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| 	chip = pasemi_nand_mtd->priv;
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| 
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| 	/* Release resources, unregister device */
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| 	nand_release(pasemi_nand_mtd);
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| 
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| 	release_region(lpcctl, 4);
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| 
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| 	iounmap(chip->IO_ADDR_R);
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| 
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| 	/* Free the MTD device structure */
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| 	kfree(pasemi_nand_mtd);
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| 
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| 	pasemi_nand_mtd = NULL;
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| 
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| 	return 0;
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| }
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| 
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| static struct of_device_id pasemi_nand_match[] =
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| {
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| 	{
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| 		.compatible   = "pasemi,localbus-nand",
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| 	},
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| 	{},
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| };
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| 
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| MODULE_DEVICE_TABLE(of, pasemi_nand_match);
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| 
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| static struct of_platform_driver pasemi_nand_driver =
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| {
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| 	.name		= (char*)driver_name,
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| 	.match_table	= pasemi_nand_match,
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| 	.probe		= pasemi_nand_probe,
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| 	.remove		= pasemi_nand_remove,
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| };
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| 
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| static int __init pasemi_nand_init(void)
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| {
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| 	return of_register_platform_driver(&pasemi_nand_driver);
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| }
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| module_init(pasemi_nand_init);
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| 
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| static void __exit pasemi_nand_exit(void)
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| {
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| 	of_unregister_platform_driver(&pasemi_nand_driver);
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| }
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| module_exit(pasemi_nand_exit);
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| 
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| MODULE_LICENSE("GPL");
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| MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
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| MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");
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