 c7208de304
			
		
	
	
	c7208de304
	
	
	
		
			
			* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (22 commits)
  x86: Fix code patching for paravirt-alternatives on 486
  x86, msr: change msr-reg.o to obj-y, and export its symbols
  x86: Use hard_smp_processor_id() to get apic id for AMD K8 cpus
  x86, sched: Workaround broken sched domain creation for AMD Magny-Cours
  x86, mcheck: Use correct cpumask for shared bank4
  x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors
  x86: Fix CPU llc_shared_map information for AMD Magny-Cours
  x86, msr: Fix msr-reg.S compilation with gas 2.16.1, on 32-bit too
  x86: Move kernel_fpu_using to irq_fpu_usable in asm/i387.h
  x86, msr: fix msr-reg.S compilation with gas 2.16.1
  x86, msr: Export the register-setting MSR functions via /dev/*/msr
  x86, msr: Create _on_cpu helpers for {rw,wr}msr_safe_regs()
  x86, msr: Have the _safe MSR functions return -EIO, not -EFAULT
  x86, msr: CFI annotations, cleanups for msr-reg.S
  x86, asm: Make _ASM_EXTABLE() usable from assembly code
  x86, asm: Add 32-bit versions of the combined CFI macros
  x86, AMD: Disable wrongly set X86_FEATURE_LAHF_LM CPUID bit
  x86, msr: Rewrite AMD rd/wrmsr variants
  x86, msr: Add rd/wrmsr interfaces with preset registers
  x86: add specific support for Intel Atom architecture
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			167 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			167 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #include <linux/smp.h>
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| #include <linux/timex.h>
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| #include <linux/string.h>
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| #include <linux/seq_file.h>
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| #include <linux/cpufreq.h>
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| 
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| /*
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|  *	Get CPU information for use by the procfs.
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|  */
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| static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
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| 			      unsigned int cpu)
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| {
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| #ifdef CONFIG_SMP
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| 	if (c->x86_max_cores * smp_num_siblings > 1) {
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| 		seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
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| 		seq_printf(m, "siblings\t: %d\n",
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| 			   cpumask_weight(cpu_core_mask(cpu)));
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| 		seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
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| 		seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
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| 		seq_printf(m, "apicid\t\t: %d\n", c->apicid);
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| 		seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
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| 	}
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| #endif
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| }
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| 
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| #ifdef CONFIG_X86_32
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| static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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| {
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| 	/*
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| 	 * We use exception 16 if we have hardware math and we've either seen
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| 	 * it or the CPU claims it is internal
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| 	 */
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| 	int fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
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| 	seq_printf(m,
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| 		   "fdiv_bug\t: %s\n"
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| 		   "hlt_bug\t\t: %s\n"
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| 		   "f00f_bug\t: %s\n"
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| 		   "coma_bug\t: %s\n"
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| 		   "fpu\t\t: %s\n"
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| 		   "fpu_exception\t: %s\n"
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| 		   "cpuid level\t: %d\n"
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| 		   "wp\t\t: %s\n",
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| 		   c->fdiv_bug ? "yes" : "no",
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| 		   c->hlt_works_ok ? "no" : "yes",
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| 		   c->f00f_bug ? "yes" : "no",
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| 		   c->coma_bug ? "yes" : "no",
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| 		   c->hard_math ? "yes" : "no",
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| 		   fpu_exception ? "yes" : "no",
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| 		   c->cpuid_level,
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| 		   c->wp_works_ok ? "yes" : "no");
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| }
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| #else
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| static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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| {
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| 	seq_printf(m,
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| 		   "fpu\t\t: yes\n"
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| 		   "fpu_exception\t: yes\n"
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| 		   "cpuid level\t: %d\n"
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| 		   "wp\t\t: yes\n",
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| 		   c->cpuid_level);
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| }
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| #endif
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| 
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| static int show_cpuinfo(struct seq_file *m, void *v)
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| {
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| 	struct cpuinfo_x86 *c = v;
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| 	unsigned int cpu = 0;
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| 	int i;
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| 
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| #ifdef CONFIG_SMP
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| 	cpu = c->cpu_index;
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| #endif
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| 	seq_printf(m, "processor\t: %u\n"
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| 		   "vendor_id\t: %s\n"
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| 		   "cpu family\t: %d\n"
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| 		   "model\t\t: %u\n"
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| 		   "model name\t: %s\n",
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| 		   cpu,
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| 		   c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
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| 		   c->x86,
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| 		   c->x86_model,
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| 		   c->x86_model_id[0] ? c->x86_model_id : "unknown");
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| 
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| 	if (c->x86_mask || c->cpuid_level >= 0)
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| 		seq_printf(m, "stepping\t: %d\n", c->x86_mask);
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| 	else
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| 		seq_printf(m, "stepping\t: unknown\n");
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| 
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| 	if (cpu_has(c, X86_FEATURE_TSC)) {
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| 		unsigned int freq = cpufreq_quick_get(cpu);
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| 
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| 		if (!freq)
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| 			freq = cpu_khz;
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| 		seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
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| 			   freq / 1000, (freq % 1000));
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| 	}
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| 
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| 	/* Cache size */
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| 	if (c->x86_cache_size >= 0)
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| 		seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
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| 
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| 	show_cpuinfo_core(m, c, cpu);
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| 	show_cpuinfo_misc(m, c);
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| 
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| 	seq_printf(m, "flags\t\t:");
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| 	for (i = 0; i < 32*NCAPINTS; i++)
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| 		if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
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| 			seq_printf(m, " %s", x86_cap_flags[i]);
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| 
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| 	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
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| 		   c->loops_per_jiffy/(500000/HZ),
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| 		   (c->loops_per_jiffy/(5000/HZ)) % 100);
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| 
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| #ifdef CONFIG_X86_64
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| 	if (c->x86_tlbsize > 0)
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| 		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
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| #endif
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| 	seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
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| 	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
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| 	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
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| 		   c->x86_phys_bits, c->x86_virt_bits);
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| 
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| 	seq_printf(m, "power management:");
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| 	for (i = 0; i < 32; i++) {
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| 		if (c->x86_power & (1 << i)) {
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| 			if (i < ARRAY_SIZE(x86_power_flags) &&
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| 			    x86_power_flags[i])
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| 				seq_printf(m, "%s%s",
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| 					   x86_power_flags[i][0] ? " " : "",
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| 					   x86_power_flags[i]);
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| 			else
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| 				seq_printf(m, " [%d]", i);
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| 		}
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| 	}
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| 
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| 	seq_printf(m, "\n\n");
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| 
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| 	return 0;
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| }
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| 
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| static void *c_start(struct seq_file *m, loff_t *pos)
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| {
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| 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
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| 		*pos = cpumask_first(cpu_online_mask);
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| 	else
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| 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
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| 	if ((*pos) < nr_cpu_ids)
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| 		return &cpu_data(*pos);
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| 	return NULL;
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| }
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| 
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| static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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| {
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| 	(*pos)++;
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| 	return c_start(m, pos);
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| }
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| 
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| static void c_stop(struct seq_file *m, void *v)
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| {
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| }
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| 
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| const struct seq_operations cpuinfo_op = {
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| 	.start	= c_start,
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| 	.next	= c_next,
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| 	.stop	= c_stop,
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| 	.show	= show_cpuinfo,
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| };
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