08cd93f9e1
This patch removes the mca-pentium boot option that was a noop.
besides the source code cleanup factor, this saves some text as well:
arch/x86/kernel/cpu/bugs.o:
text data bss dec hex filename
651 77 4 732 2dc bugs.o.before
631 53 4 688 2b0 bugs.o.after
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
183 lines
4.7 KiB
C
183 lines
4.7 KiB
C
/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Cyrix stuff, June 1998 by:
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* - Rafael R. Reilova (moved everything from head.S),
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* <rreilova@ececs.uc.edu>
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* - Channing Corn (tests & fixes),
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* - Andrew D. Balsa (code cleanup).
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*/
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#include <linux/init.h>
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#include <linux/utsname.h>
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#include <asm/bugs.h>
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#include <asm/processor.h>
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#include <asm/processor-flags.h>
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#include <asm/i387.h>
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#include <asm/msr.h>
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#include <asm/paravirt.h>
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#include <asm/alternative.h>
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static int __init no_halt(char *s)
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{
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boot_cpu_data.hlt_works_ok = 0;
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return 1;
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}
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__setup("no-hlt", no_halt);
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static int __init no_387(char *s)
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{
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boot_cpu_data.hard_math = 0;
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write_cr0(X86_CR0_TS | X86_CR0_EM | X86_CR0_MP | read_cr0());
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return 1;
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}
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__setup("no387", no_387);
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static double __initdata x = 4195835.0;
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static double __initdata y = 3145727.0;
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/*
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* This used to check for exceptions..
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* However, it turns out that to support that,
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* the XMM trap handlers basically had to
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* be buggy. So let's have a correct XMM trap
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* handler, and forget about printing out
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* some status at boot.
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*
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* We should really only care about bugs here
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* anyway. Not features.
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*/
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static void __init check_fpu(void)
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{
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if (!boot_cpu_data.hard_math) {
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#ifndef CONFIG_MATH_EMULATION
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printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
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printk(KERN_EMERG "Giving up.\n");
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for (;;) ;
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#endif
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return;
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}
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/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
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/* Test for the divl bug.. */
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__asm__("fninit\n\t"
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"fldl %1\n\t"
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"fdivl %2\n\t"
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"fmull %2\n\t"
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"fldl %1\n\t"
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"fsubp %%st,%%st(1)\n\t"
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"fistpl %0\n\t"
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"fwait\n\t"
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"fninit"
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: "=m" (*&boot_cpu_data.fdiv_bug)
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: "m" (*&x), "m" (*&y));
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if (boot_cpu_data.fdiv_bug)
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printk("Hmm, FPU with FDIV bug.\n");
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}
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static void __init check_hlt(void)
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{
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if (paravirt_enabled())
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return;
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printk(KERN_INFO "Checking 'hlt' instruction... ");
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if (!boot_cpu_data.hlt_works_ok) {
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printk("disabled\n");
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return;
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}
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halt();
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halt();
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halt();
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halt();
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printk("OK.\n");
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}
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/*
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* Most 386 processors have a bug where a POPAD can lock the
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* machine even from user space.
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*/
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static void __init check_popad(void)
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{
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#ifndef CONFIG_X86_POPAD_OK
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int res, inp = (int) &res;
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printk(KERN_INFO "Checking for popad bug... ");
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__asm__ __volatile__(
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"movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
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: "=&a" (res)
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: "d" (inp)
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: "ecx", "edi" );
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/* If this fails, it means that any user program may lock the CPU hard. Too bad. */
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if (res != 12345678) printk( "Buggy.\n" );
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else printk( "OK.\n" );
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#endif
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}
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/*
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* Check whether we are able to run this kernel safely on SMP.
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*
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* - In order to run on a i386, we need to be compiled for i386
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* (for due to lack of "invlpg" and working WP on a i386)
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* - In order to run on anything without a TSC, we need to be
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* compiled for a i486.
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* - In order to support the local APIC on a buggy Pentium machine,
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* we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
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* which happens implicitly if compiled for a Pentium or lower
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* (unless an advanced selection of CPU features is used) as an
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* otherwise config implies a properly working local APIC without
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* the need to do extra reads from the APIC.
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*/
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static void __init check_config(void)
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{
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/*
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* We'd better not be a i386 if we're configured to use some
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* i486+ only features! (WP works in supervisor mode and the
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* new "invlpg" and "bswap" instructions)
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*/
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#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
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if (boot_cpu_data.x86 == 3)
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panic("Kernel requires i486+ for 'invlpg' and other features");
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#endif
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/*
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* If we configured ourselves for a TSC, we'd better have one!
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*/
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#ifdef CONFIG_X86_TSC
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if (!cpu_has_tsc)
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panic("Kernel compiled for Pentium+, requires TSC feature!");
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#endif
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/*
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* If we were told we had a good local APIC, check for buggy Pentia,
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* i.e. all B steppings and the C2 stepping of P54C when using their
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* integrated APIC (see 11AP erratum in "Pentium Processor
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* Specification Update").
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*/
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
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&& cpu_has_apic
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&& boot_cpu_data.x86 == 5
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&& boot_cpu_data.x86_model == 2
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&& (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
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panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
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#endif
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}
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void __init check_bugs(void)
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{
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identify_boot_cpu();
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#ifndef CONFIG_SMP
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printk("CPU: ");
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print_cpu_info(&boot_cpu_data);
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#endif
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check_config();
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check_fpu();
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check_hlt();
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check_popad();
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init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
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alternative_instructions();
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}
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