 8443cc142d
			
		
	
	
	8443cc142d
	
	
	
		
			
			arch/powerpc/sysdev/fsl_soc.c:70:67: warning: incorrect type in argument 2 (different base types) arch/powerpc/sysdev/fsl_soc.c:70:67: expected restricted __be32 const [usertype] *addr arch/powerpc/sysdev/fsl_soc.c:70:67: got unsigned int const [usertype] * Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
		
			
				
	
	
		
			282 lines
		
	
	
	
		
			5.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			282 lines
		
	
	
	
		
			5.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * FSL SoC setup code
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|  *
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|  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
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|  *
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|  * 2006 (c) MontaVista Software, Inc.
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|  * Vitaly Bordug <vbordug@ru.mvista.com>
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|  *
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|  * This program is free software; you can redistribute  it and/or modify it
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|  * under  the terms of  the GNU General  Public License as published by the
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|  * Free Software Foundation;  either version 2 of the  License, or (at your
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|  * option) any later version.
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|  */
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| 
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| #include <linux/stddef.h>
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| #include <linux/kernel.h>
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| #include <linux/init.h>
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| #include <linux/errno.h>
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| #include <linux/major.h>
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| #include <linux/delay.h>
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| #include <linux/irq.h>
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| #include <linux/export.h>
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| #include <linux/device.h>
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| #include <linux/platform_device.h>
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| #include <linux/of.h>
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| #include <linux/of_platform.h>
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| #include <linux/phy.h>
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| #include <linux/phy_fixed.h>
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| #include <linux/spi/spi.h>
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| #include <linux/fsl_devices.h>
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| #include <linux/fs_enet_pd.h>
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| #include <linux/fs_uart_pd.h>
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| 
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| #include <linux/atomic.h>
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| #include <asm/io.h>
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| #include <asm/irq.h>
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| #include <asm/time.h>
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| #include <asm/prom.h>
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| #include <asm/machdep.h>
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| #include <sysdev/fsl_soc.h>
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| #include <mm/mmu_decl.h>
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| #include <asm/cpm2.h>
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| #include <asm/fsl_hcalls.h>	/* For the Freescale hypervisor */
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| 
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| extern void init_fcc_ioports(struct fs_platform_info*);
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| extern void init_fec_ioports(struct fs_platform_info*);
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| extern void init_smc_ioports(struct fs_uart_platform_info*);
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| static phys_addr_t immrbase = -1;
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| 
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| phys_addr_t get_immrbase(void)
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| {
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| 	struct device_node *soc;
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| 
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| 	if (immrbase != -1)
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| 		return immrbase;
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| 
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| 	soc = of_find_node_by_type(NULL, "soc");
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| 	if (soc) {
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| 		int size;
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| 		u32 naddr;
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| 		const __be32 *prop = of_get_property(soc, "#address-cells", &size);
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| 
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| 		if (prop && size == 4)
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| 			naddr = be32_to_cpup(prop);
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| 		else
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| 			naddr = 2;
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| 
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| 		prop = of_get_property(soc, "ranges", &size);
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| 		if (prop)
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| 			immrbase = of_translate_address(soc, prop + naddr);
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| 
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| 		of_node_put(soc);
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| 	}
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| 
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| 	return immrbase;
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| }
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| 
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| EXPORT_SYMBOL(get_immrbase);
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| 
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| static u32 sysfreq = -1;
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| 
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| u32 fsl_get_sys_freq(void)
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| {
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| 	struct device_node *soc;
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| 	const u32 *prop;
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| 	int size;
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| 
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| 	if (sysfreq != -1)
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| 		return sysfreq;
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| 
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| 	soc = of_find_node_by_type(NULL, "soc");
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| 	if (!soc)
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| 		return -1;
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| 
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| 	prop = of_get_property(soc, "clock-frequency", &size);
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| 	if (!prop || size != sizeof(*prop) || *prop == 0)
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| 		prop = of_get_property(soc, "bus-frequency", &size);
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| 
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| 	if (prop && size == sizeof(*prop))
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| 		sysfreq = *prop;
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| 
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| 	of_node_put(soc);
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| 	return sysfreq;
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| }
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| EXPORT_SYMBOL(fsl_get_sys_freq);
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| 
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| #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
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| 
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| static u32 brgfreq = -1;
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| 
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| u32 get_brgfreq(void)
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| {
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| 	struct device_node *node;
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| 	const unsigned int *prop;
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| 	int size;
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| 
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| 	if (brgfreq != -1)
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| 		return brgfreq;
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| 
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| 	node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
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| 	if (node) {
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| 		prop = of_get_property(node, "clock-frequency", &size);
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| 		if (prop && size == 4)
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| 			brgfreq = *prop;
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| 
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| 		of_node_put(node);
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| 		return brgfreq;
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| 	}
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| 
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| 	/* Legacy device binding -- will go away when no users are left. */
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| 	node = of_find_node_by_type(NULL, "cpm");
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| 	if (!node)
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| 		node = of_find_compatible_node(NULL, NULL, "fsl,qe");
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| 	if (!node)
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| 		node = of_find_node_by_type(NULL, "qe");
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| 
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| 	if (node) {
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| 		prop = of_get_property(node, "brg-frequency", &size);
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| 		if (prop && size == 4)
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| 			brgfreq = *prop;
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| 
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| 		if (brgfreq == -1 || brgfreq == 0) {
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| 			prop = of_get_property(node, "bus-frequency", &size);
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| 			if (prop && size == 4)
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| 				brgfreq = *prop / 2;
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| 		}
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| 		of_node_put(node);
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| 	}
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| 
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| 	return brgfreq;
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| }
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| 
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| EXPORT_SYMBOL(get_brgfreq);
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| 
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| static u32 fs_baudrate = -1;
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| 
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| u32 get_baudrate(void)
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| {
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| 	struct device_node *node;
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| 
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| 	if (fs_baudrate != -1)
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| 		return fs_baudrate;
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| 
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| 	node = of_find_node_by_type(NULL, "serial");
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| 	if (node) {
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| 		int size;
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| 		const unsigned int *prop = of_get_property(node,
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| 				"current-speed", &size);
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| 
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| 		if (prop)
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| 			fs_baudrate = *prop;
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| 		of_node_put(node);
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| 	}
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| 
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| 	return fs_baudrate;
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| }
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| 
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| EXPORT_SYMBOL(get_baudrate);
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| #endif /* CONFIG_CPM2 */
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| 
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| #ifdef CONFIG_FIXED_PHY
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| static int __init of_add_fixed_phys(void)
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| {
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| 	int ret;
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| 	struct device_node *np;
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| 	u32 *fixed_link;
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| 	struct fixed_phy_status status = {};
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| 
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| 	for_each_node_by_name(np, "ethernet") {
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| 		fixed_link  = (u32 *)of_get_property(np, "fixed-link", NULL);
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| 		if (!fixed_link)
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| 			continue;
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| 
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| 		status.link = 1;
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| 		status.duplex = fixed_link[1];
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| 		status.speed = fixed_link[2];
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| 		status.pause = fixed_link[3];
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| 		status.asym_pause = fixed_link[4];
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| 
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| 		ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
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| 		if (ret) {
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| 			of_node_put(np);
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| 			return ret;
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| 		}
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| 	}
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| 
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| 	return 0;
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| }
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| arch_initcall(of_add_fixed_phys);
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| #endif /* CONFIG_FIXED_PHY */
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| 
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| #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
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| static __be32 __iomem *rstcr;
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| 
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| static int __init setup_rstcr(void)
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| {
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| 	struct device_node *np;
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| 
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| 	for_each_node_by_name(np, "global-utilities") {
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| 		if ((of_get_property(np, "fsl,has-rstcr", NULL))) {
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| 			rstcr = of_iomap(np, 0) + 0xb0;
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| 			if (!rstcr)
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| 				printk (KERN_ERR "Error: reset control "
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| 						"register not mapped!\n");
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| 			break;
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| 		}
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| 	}
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| 
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| 	if (!rstcr && ppc_md.restart == fsl_rstcr_restart)
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| 		printk(KERN_ERR "No RSTCR register, warm reboot won't work\n");
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| 
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| 	if (np)
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| 		of_node_put(np);
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| 
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| 	return 0;
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| }
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| 
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| arch_initcall(setup_rstcr);
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| 
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| void fsl_rstcr_restart(char *cmd)
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| {
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| 	local_irq_disable();
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| 	if (rstcr)
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| 		/* set reset control register */
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| 		out_be32(rstcr, 0x2);	/* HRESET_REQ */
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| 
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| 	while (1) ;
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| }
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| #endif
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| 
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| #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
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| struct platform_diu_data_ops diu_ops;
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| EXPORT_SYMBOL(diu_ops);
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| #endif
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| 
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| #ifdef CONFIG_EPAPR_PARAVIRT
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| /*
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|  * Restart the current partition
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|  *
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|  * This function should be assigned to the ppc_md.restart function pointer,
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|  * to initiate a partition restart when we're running under the Freescale
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|  * hypervisor.
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|  */
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| void fsl_hv_restart(char *cmd)
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| {
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| 	pr_info("hv restart\n");
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| 	fh_partition_restart(-1);
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| }
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| 
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| /*
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|  * Halt the current partition
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|  *
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|  * This function should be assigned to the ppc_md.power_off and ppc_md.halt
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|  * function pointers, to shut down the partition when we're running under
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|  * the Freescale hypervisor.
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|  */
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| void fsl_hv_halt(void)
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| {
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| 	pr_info("hv exit\n");
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| 	fh_partition_stop(-1);
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| }
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| #endif
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