5ecfadeb89
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
102 lines
2.7 KiB
C
102 lines
2.7 KiB
C
/*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <subdev/ibus.h>
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#include <subdev/timer.h>
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struct gk20a_ibus_priv {
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struct nvkm_ibus base;
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};
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static void
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gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv)
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{
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nv_mask(priv, 0x137250, 0x3f, 0);
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nv_mask(priv, 0x000200, 0x20, 0);
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usleep_range(20, 30);
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nv_mask(priv, 0x000200, 0x20, 0x20);
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nv_wr32(priv, 0x12004c, 0x4);
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nv_wr32(priv, 0x122204, 0x2);
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nv_rd32(priv, 0x122204);
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}
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static void
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gk20a_ibus_intr(struct nvkm_subdev *subdev)
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{
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struct gk20a_ibus_priv *priv = (void *)subdev;
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u32 status0 = nv_rd32(priv, 0x120058);
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if (status0 & 0x7) {
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nv_debug(priv, "resetting priv ring\n");
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gk20a_ibus_init_priv_ring(priv);
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}
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/* Acknowledge interrupt */
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nv_mask(priv, 0x12004c, 0x2, 0x2);
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if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
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nv_warn(priv, "timeout waiting for ringmaster ack\n");
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}
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static int
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gk20a_ibus_init(struct nvkm_object *object)
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{
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struct gk20a_ibus_priv *priv = (void *)object;
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int ret;
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ret = _nvkm_ibus_init(object);
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if (ret)
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return ret;
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gk20a_ibus_init_priv_ring(priv);
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return 0;
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}
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static int
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gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct gk20a_ibus_priv *priv;
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int ret;
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ret = nvkm_ibus_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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nv_subdev(priv)->intr = gk20a_ibus_intr;
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return 0;
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}
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struct nvkm_oclass
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gk20a_ibus_oclass = {
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.handle = NV_SUBDEV(IBUS, 0xea),
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.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gk20a_ibus_ctor,
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.dtor = _nvkm_ibus_dtor,
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.init = gk20a_ibus_init,
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.fini = _nvkm_ibus_fini,
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},
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};
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