e7c29683fd
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
134 lines
3.9 KiB
C
134 lines
3.9 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "nv31.h"
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#include <subdev/instmem.h>
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/*******************************************************************************
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* MPEG object classes
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******************************************************************************/
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static int
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nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len)
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{
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struct nvkm_instmem *imem = nvkm_instmem(object);
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struct nv31_mpeg_priv *priv = (void *)object->engine;
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u32 inst = *(u32 *)arg << 4;
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u32 dma0 = nv_ro32(imem, inst + 0);
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u32 dma1 = nv_ro32(imem, inst + 4);
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u32 dma2 = nv_ro32(imem, inst + 8);
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u32 base = (dma2 & 0xfffff000) | (dma0 >> 20);
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u32 size = dma1 + 1;
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/* only allow linear DMA objects */
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if (!(dma0 & 0x00002000))
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return -EINVAL;
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if (mthd == 0x0190) {
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/* DMA_CMD */
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nv_mask(priv, 0x00b300, 0x00030000, (dma0 & 0x00030000));
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nv_wr32(priv, 0x00b334, base);
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nv_wr32(priv, 0x00b324, size);
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} else
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if (mthd == 0x01a0) {
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/* DMA_DATA */
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nv_mask(priv, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);
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nv_wr32(priv, 0x00b360, base);
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nv_wr32(priv, 0x00b364, size);
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} else {
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/* DMA_IMAGE, VRAM only */
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if (dma0 & 0x00030000)
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return -EINVAL;
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nv_wr32(priv, 0x00b370, base);
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nv_wr32(priv, 0x00b374, size);
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}
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return 0;
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}
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static struct nvkm_omthds
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nv40_mpeg_omthds[] = {
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{ 0x0190, 0x0190, nv40_mpeg_mthd_dma },
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{ 0x01a0, 0x01a0, nv40_mpeg_mthd_dma },
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{ 0x01b0, 0x01b0, nv40_mpeg_mthd_dma },
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{}
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};
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struct nvkm_oclass
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nv40_mpeg_sclass[] = {
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{ 0x3174, &nv31_mpeg_ofuncs, nv40_mpeg_omthds },
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{}
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};
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/*******************************************************************************
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* PMPEG engine/subdev functions
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******************************************************************************/
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static void
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nv40_mpeg_intr(struct nvkm_subdev *subdev)
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{
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struct nv31_mpeg_priv *priv = (void *)subdev;
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u32 stat;
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if ((stat = nv_rd32(priv, 0x00b100)))
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nv31_mpeg_intr(subdev);
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if ((stat = nv_rd32(priv, 0x00b800))) {
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nv_error(priv, "PMSRCH 0x%08x\n", stat);
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nv_wr32(priv, 0x00b800, stat);
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}
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}
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static int
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nv40_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct nv31_mpeg_priv *priv;
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int ret;
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ret = nvkm_mpeg_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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if (ret)
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return ret;
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nv_subdev(priv)->unit = 0x00000002;
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nv_subdev(priv)->intr = nv40_mpeg_intr;
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nv_engine(priv)->cclass = &nv31_mpeg_cclass;
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nv_engine(priv)->sclass = nv40_mpeg_sclass;
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nv_engine(priv)->tile_prog = nv31_mpeg_tile_prog;
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return 0;
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}
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struct nvkm_oclass
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nv40_mpeg_oclass = {
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.handle = NV_ENGINE(MPEG, 0x40),
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.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = nv40_mpeg_ctor,
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.dtor = _nvkm_mpeg_dtor,
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.init = nv31_mpeg_init,
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.fini = _nvkm_mpeg_fini,
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},
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};
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