 b486ddbc0f
			
		
	
	
	b486ddbc0f
	
	
	
		
			
			Support for the s6000 on-chip i2c controller. Signed-off-by: Oskar Schirmer <os@emlix.com> Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
		
			
				
	
	
		
			79 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			79 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * drivers/i2c/busses/i2c-s6000.h
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * Copyright (C) 2008 Emlix GmbH <info@emlix.com>
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|  * Author:	Oskar Schirmer <os@emlix.com>
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|  */
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| 
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| #ifndef __DRIVERS_I2C_BUSSES_I2C_S6000_H
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| #define __DRIVERS_I2C_BUSSES_I2C_S6000_H
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| 
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| #define S6_I2C_CON		0x000
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| #define S6_I2C_CON_MASTER		0
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| #define S6_I2C_CON_SPEED		1
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| #define S6_I2C_CON_SPEED_NORMAL			1
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| #define S6_I2C_CON_SPEED_FAST			2
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| #define S6_I2C_CON_SPEED_MASK			3
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| #define S6_I2C_CON_10BITSLAVE		3
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| #define S6_I2C_CON_10BITMASTER		4
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| #define S6_I2C_CON_RESTARTENA		5
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| #define S6_I2C_CON_SLAVEDISABLE		6
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| #define S6_I2C_TAR		0x004
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| #define S6_I2C_TAR_GCORSTART		10
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| #define S6_I2C_TAR_SPECIAL		11
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| #define S6_I2C_SAR		0x008
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| #define S6_I2C_HSMADDR		0x00C
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| #define S6_I2C_DATACMD		0x010
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| #define S6_I2C_DATACMD_READ		8
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| #define S6_I2C_SSHCNT		0x014
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| #define S6_I2C_SSLCNT		0x018
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| #define S6_I2C_FSHCNT		0x01C
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| #define S6_I2C_FSLCNT		0x020
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| #define S6_I2C_INTRSTAT		0x02C
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| #define S6_I2C_INTRMASK		0x030
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| #define S6_I2C_RAWINTR		0x034
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| #define S6_I2C_INTR_RXUNDER		0
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| #define S6_I2C_INTR_RXOVER		1
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| #define S6_I2C_INTR_RXFULL		2
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| #define S6_I2C_INTR_TXOVER		3
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| #define S6_I2C_INTR_TXEMPTY		4
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| #define S6_I2C_INTR_RDREQ		5
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| #define S6_I2C_INTR_TXABRT		6
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| #define S6_I2C_INTR_RXDONE		7
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| #define S6_I2C_INTR_ACTIVITY		8
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| #define S6_I2C_INTR_STOPDET		9
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| #define S6_I2C_INTR_STARTDET		10
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| #define S6_I2C_INTR_GENCALL		11
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| #define S6_I2C_RXTL		0x038
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| #define S6_I2C_TXTL		0x03C
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| #define S6_I2C_CLRINTR		0x040
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| #define S6_I2C_CLRRXUNDER	0x044
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| #define S6_I2C_CLRRXOVER	0x048
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| #define S6_I2C_CLRTXOVER	0x04C
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| #define S6_I2C_CLRRDREQ		0x050
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| #define S6_I2C_CLRTXABRT	0x054
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| #define S6_I2C_CLRRXDONE	0x058
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| #define S6_I2C_CLRACTIVITY	0x05C
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| #define S6_I2C_CLRSTOPDET	0x060
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| #define S6_I2C_CLRSTARTDET	0x064
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| #define S6_I2C_CLRGENCALL	0x068
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| #define S6_I2C_ENABLE		0x06C
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| #define S6_I2C_STATUS		0x070
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| #define S6_I2C_STATUS_ACTIVITY		0
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| #define S6_I2C_STATUS_TFNF		1
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| #define S6_I2C_STATUS_TFE		2
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| #define S6_I2C_STATUS_RFNE		3
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| #define S6_I2C_STATUS_RFF		4
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| #define S6_I2C_TXFLR		0x074
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| #define S6_I2C_RXFLR		0x078
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| #define S6_I2C_SRESET		0x07C
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| #define S6_I2C_SRESET_IC_SRST		0
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| #define S6_I2C_SRESET_IC_MASTER_SRST	1
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| #define S6_I2C_SRESET_IC_SLAVE_SRST	2
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| #define S6_I2C_TXABRTSOURCE	0x080
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| 
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| #endif
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