1e02ce4ccc
Context switches and TLB flushes can change individual bits of CR4. CR4 reads take several cycles, so store a shadow copy of CR4 in a per-cpu variable. To avoid wasting a cache line, I added the CR4 shadow to cpu_tlbstate, which is already touched in switch_mm. The heaviest users of the cr4 shadow will be switch_mm and __switch_to_xtra, and __switch_to_xtra is called shortly after switch_mm during context switch, so the cacheline is likely to be hot. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Kees Cook <keescook@chromium.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Vince Weaver <vince@deater.net> Cc: "hillf.zj" <hillf.zj@alibaba-inc.com> Cc: Valdis Kletnieks <Valdis.Kletnieks@vt.edu> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
/*
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* linux/arch/i386/kernel/head32.c -- prepare to run common code
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*
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* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
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* Copyright (C) 2007 Eric Biederman <ebiederm@xmission.com>
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*/
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#include <linux/init.h>
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#include <linux/start_kernel.h>
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#include <linux/mm.h>
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#include <linux/memblock.h>
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#include <asm/setup.h>
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#include <asm/sections.h>
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#include <asm/e820.h>
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#include <asm/page.h>
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/bios_ebda.h>
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#include <asm/tlbflush.h>
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#include <asm/bootparam_utils.h>
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static void __init i386_default_early_setup(void)
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{
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/* Initialize 32bit specific setup functions */
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x86_init.resources.reserve_resources = i386_reserve_resources;
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x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
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reserve_ebda_region();
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}
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asmlinkage __visible void __init i386_start_kernel(void)
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{
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cr4_init_shadow();
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sanitize_boot_params(&boot_params);
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/* Call the subarch specific early setup function */
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switch (boot_params.hdr.hardware_subarch) {
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case X86_SUBARCH_INTEL_MID:
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x86_intel_mid_early_setup();
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break;
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case X86_SUBARCH_CE4100:
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x86_ce4100_early_setup();
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break;
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default:
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i386_default_early_setup();
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break;
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}
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start_kernel();
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}
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