 9e0304e388
			
		
	
	
	9e0304e388
	
	
	
		
			
			Instruction bundles are always little-endian, even when running in big-endian mode. I missed this internal bug fix when cherry-picking the big-endian code to return to the community. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
		
			
				
	
	
		
			683 lines
		
	
	
	
		
			18 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			683 lines
		
	
	
	
		
			18 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2011 Tilera Corporation. All Rights Reserved.
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|  *
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|  *   This program is free software; you can redistribute it and/or
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|  *   modify it under the terms of the GNU General Public License
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|  *   as published by the Free Software Foundation, version 2.
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|  *
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|  *   This program is distributed in the hope that it will be useful, but
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|  *   WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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|  *   NON INFRINGEMENT.  See the GNU General Public License for
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|  *   more details.
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/string.h>
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| #include <asm/byteorder.h>
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| #include <asm/backtrace.h>
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| #include <asm/tile-desc.h>
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| #include <arch/abi.h>
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| 
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| #ifdef __tilegx__
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| #define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
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| #define tile_decoded_instruction tilegx_decoded_instruction
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| #define tile_mnemonic tilegx_mnemonic
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| #define parse_insn_tile parse_insn_tilegx
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| #define TILE_OPC_IRET TILEGX_OPC_IRET
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| #define TILE_OPC_ADDI TILEGX_OPC_ADDI
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| #define TILE_OPC_ADDLI TILEGX_OPC_ADDLI
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| #define TILE_OPC_INFO TILEGX_OPC_INFO
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| #define TILE_OPC_INFOL TILEGX_OPC_INFOL
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| #define TILE_OPC_JRP TILEGX_OPC_JRP
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| #define TILE_OPC_MOVE TILEGX_OPC_MOVE
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| #define OPCODE_STORE TILEGX_OPC_ST
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| typedef long long bt_int_reg_t;
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| #else
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| #define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE
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| #define tile_decoded_instruction tilepro_decoded_instruction
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| #define tile_mnemonic tilepro_mnemonic
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| #define parse_insn_tile parse_insn_tilepro
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| #define TILE_OPC_IRET TILEPRO_OPC_IRET
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| #define TILE_OPC_ADDI TILEPRO_OPC_ADDI
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| #define TILE_OPC_ADDLI TILEPRO_OPC_ADDLI
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| #define TILE_OPC_INFO TILEPRO_OPC_INFO
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| #define TILE_OPC_INFOL TILEPRO_OPC_INFOL
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| #define TILE_OPC_JRP TILEPRO_OPC_JRP
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| #define TILE_OPC_MOVE TILEPRO_OPC_MOVE
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| #define OPCODE_STORE TILEPRO_OPC_SW
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| typedef int bt_int_reg_t;
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| #endif
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| 
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| /* A decoded bundle used for backtracer analysis. */
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| struct BacktraceBundle {
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| 	tile_bundle_bits bits;
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| 	int num_insns;
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| 	struct tile_decoded_instruction
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| 	insns[TILE_MAX_INSTRUCTIONS_PER_BUNDLE];
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| };
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| 
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| 
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| /* Locates an instruction inside the given bundle that
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|  * has the specified mnemonic, and whose first 'num_operands_to_match'
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|  * operands exactly match those in 'operand_values'.
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|  */
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| static const struct tile_decoded_instruction *find_matching_insn(
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| 	const struct BacktraceBundle *bundle,
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| 	tile_mnemonic mnemonic,
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| 	const int *operand_values,
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| 	int num_operands_to_match)
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| {
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| 	int i, j;
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| 	bool match;
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| 
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| 	for (i = 0; i < bundle->num_insns; i++) {
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| 		const struct tile_decoded_instruction *insn =
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| 			&bundle->insns[i];
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| 
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| 		if (insn->opcode->mnemonic != mnemonic)
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| 			continue;
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| 
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| 		match = true;
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| 		for (j = 0; j < num_operands_to_match; j++) {
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| 			if (operand_values[j] != insn->operand_values[j]) {
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| 				match = false;
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| 				break;
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| 			}
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| 		}
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| 
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| 		if (match)
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| 			return insn;
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| 	}
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| 
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| 	return NULL;
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| }
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| 
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| /* Does this bundle contain an 'iret' instruction? */
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| static inline bool bt_has_iret(const struct BacktraceBundle *bundle)
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| {
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| 	return find_matching_insn(bundle, TILE_OPC_IRET, NULL, 0) != NULL;
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| }
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| 
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| /* Does this bundle contain an 'addi sp, sp, OFFSET' or
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|  * 'addli sp, sp, OFFSET' instruction, and if so, what is OFFSET?
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|  */
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| static bool bt_has_addi_sp(const struct BacktraceBundle *bundle, int *adjust)
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| {
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| 	static const int vals[2] = { TREG_SP, TREG_SP };
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| 
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| 	const struct tile_decoded_instruction *insn =
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| 		find_matching_insn(bundle, TILE_OPC_ADDI, vals, 2);
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| 	if (insn == NULL)
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| 		insn = find_matching_insn(bundle, TILE_OPC_ADDLI, vals, 2);
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| #ifdef __tilegx__
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| 	if (insn == NULL)
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| 		insn = find_matching_insn(bundle, TILEGX_OPC_ADDXLI, vals, 2);
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| 	if (insn == NULL)
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| 		insn = find_matching_insn(bundle, TILEGX_OPC_ADDXI, vals, 2);
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| #endif
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| 	if (insn == NULL)
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| 		return false;
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| 
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| 	*adjust = insn->operand_values[2];
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| 	return true;
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| }
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| 
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| /* Does this bundle contain any 'info OP' or 'infol OP'
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|  * instruction, and if so, what are their OP?  Note that OP is interpreted
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|  * as an unsigned value by this code since that's what the caller wants.
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|  * Returns the number of info ops found.
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|  */
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| static int bt_get_info_ops(const struct BacktraceBundle *bundle,
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| 		int operands[MAX_INFO_OPS_PER_BUNDLE])
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| {
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| 	int num_ops = 0;
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| 	int i;
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| 
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| 	for (i = 0; i < bundle->num_insns; i++) {
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| 		const struct tile_decoded_instruction *insn =
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| 			&bundle->insns[i];
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| 
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| 		if (insn->opcode->mnemonic == TILE_OPC_INFO ||
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| 		    insn->opcode->mnemonic == TILE_OPC_INFOL) {
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| 			operands[num_ops++] = insn->operand_values[0];
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| 		}
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| 	}
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| 
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| 	return num_ops;
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| }
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| 
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| /* Does this bundle contain a jrp instruction, and if so, to which
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|  * register is it jumping?
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|  */
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| static bool bt_has_jrp(const struct BacktraceBundle *bundle, int *target_reg)
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| {
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| 	const struct tile_decoded_instruction *insn =
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| 		find_matching_insn(bundle, TILE_OPC_JRP, NULL, 0);
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| 	if (insn == NULL)
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| 		return false;
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| 
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| 	*target_reg = insn->operand_values[0];
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| 	return true;
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| }
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| 
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| /* Does this bundle modify the specified register in any way? */
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| static bool bt_modifies_reg(const struct BacktraceBundle *bundle, int reg)
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| {
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| 	int i, j;
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| 	for (i = 0; i < bundle->num_insns; i++) {
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| 		const struct tile_decoded_instruction *insn =
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| 			&bundle->insns[i];
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| 
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| 		if (insn->opcode->implicitly_written_register == reg)
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| 			return true;
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| 
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| 		for (j = 0; j < insn->opcode->num_operands; j++)
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| 			if (insn->operands[j]->is_dest_reg &&
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| 			    insn->operand_values[j] == reg)
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| 				return true;
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| 	}
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| 
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| 	return false;
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| }
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| 
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| /* Does this bundle modify sp? */
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| static inline bool bt_modifies_sp(const struct BacktraceBundle *bundle)
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| {
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| 	return bt_modifies_reg(bundle, TREG_SP);
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| }
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| 
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| /* Does this bundle modify lr? */
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| static inline bool bt_modifies_lr(const struct BacktraceBundle *bundle)
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| {
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| 	return bt_modifies_reg(bundle, TREG_LR);
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| }
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| 
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| /* Does this bundle contain the instruction 'move fp, sp'? */
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| static inline bool bt_has_move_r52_sp(const struct BacktraceBundle *bundle)
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| {
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| 	static const int vals[2] = { 52, TREG_SP };
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| 	return find_matching_insn(bundle, TILE_OPC_MOVE, vals, 2) != NULL;
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| }
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| 
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| /* Does this bundle contain a store of lr to sp? */
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| static inline bool bt_has_sw_sp_lr(const struct BacktraceBundle *bundle)
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| {
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| 	static const int vals[2] = { TREG_SP, TREG_LR };
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| 	return find_matching_insn(bundle, OPCODE_STORE, vals, 2) != NULL;
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| }
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| 
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| #ifdef __tilegx__
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| /* Track moveli values placed into registers. */
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| static inline void bt_update_moveli(const struct BacktraceBundle *bundle,
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| 				    int moveli_args[])
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| {
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| 	int i;
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| 	for (i = 0; i < bundle->num_insns; i++) {
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| 		const struct tile_decoded_instruction *insn =
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| 			&bundle->insns[i];
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| 
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| 		if (insn->opcode->mnemonic == TILEGX_OPC_MOVELI) {
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| 			int reg = insn->operand_values[0];
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| 			moveli_args[reg] = insn->operand_values[1];
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| 		}
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| 	}
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| }
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| 
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| /* Does this bundle contain an 'add sp, sp, reg' instruction
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|  * from a register that we saw a moveli into, and if so, what
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|  * is the value in the register?
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|  */
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| static bool bt_has_add_sp(const struct BacktraceBundle *bundle, int *adjust,
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| 			  int moveli_args[])
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| {
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| 	static const int vals[2] = { TREG_SP, TREG_SP };
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| 
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| 	const struct tile_decoded_instruction *insn =
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| 		find_matching_insn(bundle, TILEGX_OPC_ADDX, vals, 2);
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| 	if (insn) {
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| 		int reg = insn->operand_values[2];
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| 		if (moveli_args[reg]) {
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| 			*adjust = moveli_args[reg];
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| 			return true;
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| 		}
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| 	}
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| 	return false;
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| }
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| #endif
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| 
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| /* Locates the caller's PC and SP for a program starting at the
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|  * given address.
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|  */
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| static void find_caller_pc_and_caller_sp(CallerLocation *location,
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| 					 const unsigned long start_pc,
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| 					 BacktraceMemoryReader read_memory_func,
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| 					 void *read_memory_func_extra)
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| {
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| 	/* Have we explicitly decided what the sp is,
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| 	 * rather than just the default?
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| 	 */
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| 	bool sp_determined = false;
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| 
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| 	/* Has any bundle seen so far modified lr? */
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| 	bool lr_modified = false;
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| 
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| 	/* Have we seen a move from sp to fp? */
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| 	bool sp_moved_to_r52 = false;
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| 
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| 	/* Have we seen a terminating bundle? */
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| 	bool seen_terminating_bundle = false;
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| 
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| 	/* Cut down on round-trip reading overhead by reading several
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| 	 * bundles at a time.
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| 	 */
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| 	tile_bundle_bits prefetched_bundles[32];
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| 	int num_bundles_prefetched = 0;
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| 	int next_bundle = 0;
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| 	unsigned long pc;
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| 
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| #ifdef __tilegx__
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| 	/* Naively try to track moveli values to support addx for -m32. */
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| 	int moveli_args[TILEGX_NUM_REGISTERS] = { 0 };
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| #endif
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| 
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| 	/* Default to assuming that the caller's sp is the current sp.
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| 	 * This is necessary to handle the case where we start backtracing
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| 	 * right at the end of the epilog.
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| 	 */
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| 	location->sp_location = SP_LOC_OFFSET;
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| 	location->sp_offset = 0;
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| 
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| 	/* Default to having no idea where the caller PC is. */
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| 	location->pc_location = PC_LOC_UNKNOWN;
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| 
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| 	/* Don't even try if the PC is not aligned. */
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| 	if (start_pc % TILE_BUNDLE_ALIGNMENT_IN_BYTES != 0)
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| 		return;
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| 
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| 	for (pc = start_pc;; pc += sizeof(tile_bundle_bits)) {
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| 
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| 		struct BacktraceBundle bundle;
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| 		int num_info_ops, info_operands[MAX_INFO_OPS_PER_BUNDLE];
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| 		int one_ago, jrp_reg;
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| 		bool has_jrp;
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| 
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| 		if (next_bundle >= num_bundles_prefetched) {
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| 			/* Prefetch some bytes, but don't cross a page
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| 			 * boundary since that might cause a read failure we
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| 			 * don't care about if we only need the first few
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| 			 * bytes. Note: we don't care what the actual page
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| 			 * size is; using the minimum possible page size will
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| 			 * prevent any problems.
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| 			 */
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| 			unsigned int bytes_to_prefetch = 4096 - (pc & 4095);
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| 			if (bytes_to_prefetch > sizeof prefetched_bundles)
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| 				bytes_to_prefetch = sizeof prefetched_bundles;
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| 
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| 			if (!read_memory_func(prefetched_bundles, pc,
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| 					      bytes_to_prefetch,
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| 					      read_memory_func_extra)) {
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| 				if (pc == start_pc) {
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| 					/* The program probably called a bad
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| 					 * address, such as a NULL pointer.
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| 					 * So treat this as if we are at the
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| 					 * start of the function prolog so the
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| 					 * backtrace will show how we got here.
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| 					 */
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| 					location->pc_location = PC_LOC_IN_LR;
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| 					return;
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| 				}
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| 
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| 				/* Unreadable address. Give up. */
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| 				break;
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| 			}
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| 
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| 			next_bundle = 0;
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| 			num_bundles_prefetched =
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| 				bytes_to_prefetch / sizeof(tile_bundle_bits);
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| 		}
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| 
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| 		/*
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| 		 * Decode the next bundle.
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| 		 * TILE always stores instruction bundles in little-endian
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| 		 * mode, even when the chip is running in big-endian mode.
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| 		 */
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| 		bundle.bits = le64_to_cpu(prefetched_bundles[next_bundle++]);
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| 		bundle.num_insns =
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| 			parse_insn_tile(bundle.bits, pc, bundle.insns);
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| 		num_info_ops = bt_get_info_ops(&bundle, info_operands);
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| 
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| 		/* First look at any one_ago info ops if they are interesting,
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| 		 * since they should shadow any non-one-ago info ops.
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| 		 */
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| 		for (one_ago = (pc != start_pc) ? 1 : 0;
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| 		     one_ago >= 0; one_ago--) {
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| 			int i;
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| 			for (i = 0; i < num_info_ops; i++) {
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| 				int info_operand = info_operands[i];
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| 				if (info_operand < CALLER_UNKNOWN_BASE)	{
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| 					/* Weird; reserved value, ignore it. */
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| 					continue;
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| 				}
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| 
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| 				/* Skip info ops which are not in the
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| 				 * "one_ago" mode we want right now.
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| 				 */
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| 				if (((info_operand & ONE_BUNDLE_AGO_FLAG) != 0)
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| 				    != (one_ago != 0))
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| 					continue;
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| 
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| 				/* Clear the flag to make later checking
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| 				 * easier. */
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| 				info_operand &= ~ONE_BUNDLE_AGO_FLAG;
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| 
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| 				/* Default to looking at PC_IN_LR_FLAG. */
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| 				if (info_operand & PC_IN_LR_FLAG)
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| 					location->pc_location =
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| 						PC_LOC_IN_LR;
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| 				else
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| 					location->pc_location =
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| 						PC_LOC_ON_STACK;
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| 
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| 				switch (info_operand) {
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| 				case CALLER_UNKNOWN_BASE:
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| 					location->pc_location = PC_LOC_UNKNOWN;
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| 					location->sp_location = SP_LOC_UNKNOWN;
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| 					return;
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| 
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| 				case CALLER_SP_IN_R52_BASE:
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| 				case CALLER_SP_IN_R52_BASE | PC_IN_LR_FLAG:
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| 					location->sp_location = SP_LOC_IN_R52;
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| 					return;
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| 
 | |
| 				default:
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| 				{
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| 					const unsigned int val = info_operand
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| 						- CALLER_SP_OFFSET_BASE;
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| 					const unsigned int sp_offset =
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| 						(val >> NUM_INFO_OP_FLAGS) * 8;
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| 					if (sp_offset < 32768) {
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| 						/* This is a properly encoded
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| 						 * SP offset. */
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| 						location->sp_location =
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| 							SP_LOC_OFFSET;
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| 						location->sp_offset =
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| 							sp_offset;
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| 						return;
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| 					} else {
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| 						/* This looked like an SP
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| 						 * offset, but it's outside
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| 						 * the legal range, so this
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| 						 * must be an unrecognized
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| 						 * info operand.  Ignore it.
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| 						 */
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| 					}
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| 				}
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| 				break;
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| 				}
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| 			}
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| 		}
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| 
 | |
| 		if (seen_terminating_bundle) {
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| 			/* We saw a terminating bundle during the previous
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| 			 * iteration, so we were only looking for an info op.
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| 			 */
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| 			break;
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| 		}
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| 
 | |
| 		if (bundle.bits == 0) {
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| 			/* Wacky terminating bundle. Stop looping, and hope
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| 			 * we've already seen enough to find the caller.
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| 			 */
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| 			break;
 | |
| 		}
 | |
| 
 | |
| 		/*
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| 		 * Try to determine caller's SP.
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| 		 */
 | |
| 
 | |
| 		if (!sp_determined) {
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| 			int adjust;
 | |
| 			if (bt_has_addi_sp(&bundle, &adjust)
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| #ifdef __tilegx__
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| 			    || bt_has_add_sp(&bundle, &adjust, moveli_args)
 | |
| #endif
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| 				) {
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| 				location->sp_location = SP_LOC_OFFSET;
 | |
| 
 | |
| 				if (adjust <= 0) {
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| 					/* We are in prolog about to adjust
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| 					 * SP. */
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| 					location->sp_offset = 0;
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| 				} else {
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| 					/* We are in epilog restoring SP. */
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| 					location->sp_offset = adjust;
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| 				}
 | |
| 
 | |
| 				sp_determined = true;
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| 			} else {
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| 				if (bt_has_move_r52_sp(&bundle)) {
 | |
| 					/* Maybe in prolog, creating an
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| 					 * alloca-style frame.  But maybe in
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| 					 * the middle of a fixed-size frame
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| 					 * clobbering r52 with SP.
 | |
| 					 */
 | |
| 					sp_moved_to_r52 = true;
 | |
| 				}
 | |
| 
 | |
| 				if (bt_modifies_sp(&bundle)) {
 | |
| 					if (sp_moved_to_r52) {
 | |
| 						/* We saw SP get saved into
 | |
| 						 * r52 earlier (or now), which
 | |
| 						 * must have been in the
 | |
| 						 * prolog, so we now know that
 | |
| 						 * SP is still holding the
 | |
| 						 * caller's sp value.
 | |
| 						 */
 | |
| 						location->sp_location =
 | |
| 							SP_LOC_OFFSET;
 | |
| 						location->sp_offset = 0;
 | |
| 					} else {
 | |
| 						/* Someone must have saved
 | |
| 						 * aside the caller's SP value
 | |
| 						 * into r52, so r52 holds the
 | |
| 						 * current value.
 | |
| 						 */
 | |
| 						location->sp_location =
 | |
| 							SP_LOC_IN_R52;
 | |
| 					}
 | |
| 					sp_determined = true;
 | |
| 				}
 | |
| 			}
 | |
| 
 | |
| #ifdef __tilegx__
 | |
| 			/* Track moveli arguments for -m32 mode. */
 | |
| 			bt_update_moveli(&bundle, moveli_args);
 | |
| #endif
 | |
| 		}
 | |
| 
 | |
| 		if (bt_has_iret(&bundle)) {
 | |
| 			/* This is a terminating bundle. */
 | |
| 			seen_terminating_bundle = true;
 | |
| 			continue;
 | |
| 		}
 | |
| 
 | |
| 		/*
 | |
| 		 * Try to determine caller's PC.
 | |
| 		 */
 | |
| 
 | |
| 		jrp_reg = -1;
 | |
| 		has_jrp = bt_has_jrp(&bundle, &jrp_reg);
 | |
| 		if (has_jrp)
 | |
| 			seen_terminating_bundle = true;
 | |
| 
 | |
| 		if (location->pc_location == PC_LOC_UNKNOWN) {
 | |
| 			if (has_jrp) {
 | |
| 				if (jrp_reg == TREG_LR && !lr_modified) {
 | |
| 					/* Looks like a leaf function, or else
 | |
| 					 * lr is already restored. */
 | |
| 					location->pc_location =
 | |
| 						PC_LOC_IN_LR;
 | |
| 				} else {
 | |
| 					location->pc_location =
 | |
| 						PC_LOC_ON_STACK;
 | |
| 				}
 | |
| 			} else if (bt_has_sw_sp_lr(&bundle)) {
 | |
| 				/* In prolog, spilling initial lr to stack. */
 | |
| 				location->pc_location = PC_LOC_IN_LR;
 | |
| 			} else if (bt_modifies_lr(&bundle)) {
 | |
| 				lr_modified = true;
 | |
| 			}
 | |
| 		}
 | |
| 	}
 | |
| }
 | |
| 
 | |
| /* Initializes a backtracer to start from the given location.
 | |
|  *
 | |
|  * If the frame pointer cannot be determined it is set to -1.
 | |
|  *
 | |
|  * state: The state to be filled in.
 | |
|  * read_memory_func: A callback that reads memory.
 | |
|  * read_memory_func_extra: An arbitrary argument to read_memory_func.
 | |
|  * pc: The current PC.
 | |
|  * lr: The current value of the 'lr' register.
 | |
|  * sp: The current value of the 'sp' register.
 | |
|  * r52: The current value of the 'r52' register.
 | |
|  */
 | |
| void backtrace_init(BacktraceIterator *state,
 | |
| 		    BacktraceMemoryReader read_memory_func,
 | |
| 		    void *read_memory_func_extra,
 | |
| 		    unsigned long pc, unsigned long lr,
 | |
| 		    unsigned long sp, unsigned long r52)
 | |
| {
 | |
| 	CallerLocation location;
 | |
| 	unsigned long fp, initial_frame_caller_pc;
 | |
| 
 | |
| 	/* Find out where we are in the initial frame. */
 | |
| 	find_caller_pc_and_caller_sp(&location, pc,
 | |
| 				     read_memory_func, read_memory_func_extra);
 | |
| 
 | |
| 	switch (location.sp_location) {
 | |
| 	case SP_LOC_UNKNOWN:
 | |
| 		/* Give up. */
 | |
| 		fp = -1;
 | |
| 		break;
 | |
| 
 | |
| 	case SP_LOC_IN_R52:
 | |
| 		fp = r52;
 | |
| 		break;
 | |
| 
 | |
| 	case SP_LOC_OFFSET:
 | |
| 		fp = sp + location.sp_offset;
 | |
| 		break;
 | |
| 
 | |
| 	default:
 | |
| 		/* Give up. */
 | |
| 		fp = -1;
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	/* If the frame pointer is not aligned to the basic word size
 | |
| 	 * something terrible happened and we should mark it as invalid.
 | |
| 	 */
 | |
| 	if (fp % sizeof(bt_int_reg_t) != 0)
 | |
| 		fp = -1;
 | |
| 
 | |
| 	/* -1 means "don't know initial_frame_caller_pc". */
 | |
| 	initial_frame_caller_pc = -1;
 | |
| 
 | |
| 	switch (location.pc_location) {
 | |
| 	case PC_LOC_UNKNOWN:
 | |
| 		/* Give up. */
 | |
| 		fp = -1;
 | |
| 		break;
 | |
| 
 | |
| 	case PC_LOC_IN_LR:
 | |
| 		if (lr == 0 || lr % TILE_BUNDLE_ALIGNMENT_IN_BYTES != 0) {
 | |
| 			/* Give up. */
 | |
| 			fp = -1;
 | |
| 		} else {
 | |
| 			initial_frame_caller_pc = lr;
 | |
| 		}
 | |
| 		break;
 | |
| 
 | |
| 	case PC_LOC_ON_STACK:
 | |
| 		/* Leave initial_frame_caller_pc as -1,
 | |
| 		 * meaning check the stack.
 | |
| 		 */
 | |
| 		break;
 | |
| 
 | |
| 	default:
 | |
| 		/* Give up. */
 | |
| 		fp = -1;
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	state->pc = pc;
 | |
| 	state->sp = sp;
 | |
| 	state->fp = fp;
 | |
| 	state->initial_frame_caller_pc = initial_frame_caller_pc;
 | |
| 	state->read_memory_func = read_memory_func;
 | |
| 	state->read_memory_func_extra = read_memory_func_extra;
 | |
| }
 | |
| 
 | |
| /* Handle the case where the register holds more bits than the VA. */
 | |
| static bool valid_addr_reg(bt_int_reg_t reg)
 | |
| {
 | |
| 	return ((unsigned long)reg == reg);
 | |
| }
 | |
| 
 | |
| /* Advances the backtracing state to the calling frame, returning
 | |
|  * true iff successful.
 | |
|  */
 | |
| bool backtrace_next(BacktraceIterator *state)
 | |
| {
 | |
| 	unsigned long next_fp, next_pc;
 | |
| 	bt_int_reg_t next_frame[2];
 | |
| 
 | |
| 	if (state->fp == -1) {
 | |
| 		/* No parent frame. */
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	/* Try to read the frame linkage data chaining to the next function. */
 | |
| 	if (!state->read_memory_func(&next_frame, state->fp, sizeof next_frame,
 | |
| 				     state->read_memory_func_extra)) {
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	next_fp = next_frame[1];
 | |
| 	if (!valid_addr_reg(next_frame[1]) ||
 | |
| 	    next_fp % sizeof(bt_int_reg_t) != 0) {
 | |
| 		/* Caller's frame pointer is suspect, so give up. */
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	if (state->initial_frame_caller_pc != -1) {
 | |
| 		/* We must be in the initial stack frame and already know the
 | |
| 		 * caller PC.
 | |
| 		 */
 | |
| 		next_pc = state->initial_frame_caller_pc;
 | |
| 
 | |
| 		/* Force reading stack next time, in case we were in the
 | |
| 		 * initial frame.  We don't do this above just to paranoidly
 | |
| 		 * avoid changing the struct at all when we return false.
 | |
| 		 */
 | |
| 		state->initial_frame_caller_pc = -1;
 | |
| 	} else {
 | |
| 		/* Get the caller PC from the frame linkage area. */
 | |
| 		next_pc = next_frame[0];
 | |
| 		if (!valid_addr_reg(next_frame[0]) || next_pc == 0 ||
 | |
| 		    next_pc % TILE_BUNDLE_ALIGNMENT_IN_BYTES != 0) {
 | |
| 			/* The PC is suspect, so give up. */
 | |
| 			return false;
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 	/* Update state to become the caller's stack frame. */
 | |
| 	state->pc = next_pc;
 | |
| 	state->sp = state->fp;
 | |
| 	state->fp = next_fp;
 | |
| 
 | |
| 	return true;
 | |
| }
 |