 d7d5b05faf
			
		
	
	
	d7d5b05faf
	
	
	
		
			
			Since all the files are in arch/mips/kvm/, there's no need of the prefixes "kvm_" and "kvm_mips_". Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
		
			
				
	
	
		
			148 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			148 lines
		
	
	
	
		
			4.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * KVM/MIPS: Binary Patching for privileged instructions, reduces traps.
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|  *
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|  * Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
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|  * Authors: Sanjay Lal <sanjayl@kymasys.com>
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|  */
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| 
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| #include <linux/errno.h>
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| #include <linux/err.h>
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| #include <linux/kvm_host.h>
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| #include <linux/module.h>
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| #include <linux/vmalloc.h>
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| #include <linux/fs.h>
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| #include <linux/bootmem.h>
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| #include <asm/cacheflush.h>
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| 
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| #include "commpage.h"
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| 
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| #define SYNCI_TEMPLATE  0x041f0000
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| #define SYNCI_BASE(x)   (((x) >> 21) & 0x1f)
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| #define SYNCI_OFFSET    ((x) & 0xffff)
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| 
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| #define LW_TEMPLATE     0x8c000000
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| #define CLEAR_TEMPLATE  0x00000020
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| #define SW_TEMPLATE     0xac000000
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| 
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| int kvm_mips_trans_cache_index(uint32_t inst, uint32_t *opc,
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| 			       struct kvm_vcpu *vcpu)
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| {
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| 	int result = 0;
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| 	unsigned long kseg0_opc;
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| 	uint32_t synci_inst = 0x0;
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| 
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| 	/* Replace the CACHE instruction, with a NOP */
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| 	kseg0_opc =
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| 	    CKSEG0ADDR(kvm_mips_translate_guest_kseg0_to_hpa
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| 		       (vcpu, (unsigned long) opc));
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| 	memcpy((void *)kseg0_opc, (void *)&synci_inst, sizeof(uint32_t));
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| 	local_flush_icache_range(kseg0_opc, kseg0_opc + 32);
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| 
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| 	return result;
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| }
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| 
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| /*
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|  * Address based CACHE instructions are transformed into synci(s). A little
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|  * heavy for just D-cache invalidates, but avoids an expensive trap
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|  */
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| int kvm_mips_trans_cache_va(uint32_t inst, uint32_t *opc,
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| 			    struct kvm_vcpu *vcpu)
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| {
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| 	int result = 0;
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| 	unsigned long kseg0_opc;
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| 	uint32_t synci_inst = SYNCI_TEMPLATE, base, offset;
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| 
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| 	base = (inst >> 21) & 0x1f;
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| 	offset = inst & 0xffff;
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| 	synci_inst |= (base << 21);
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| 	synci_inst |= offset;
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| 
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| 	kseg0_opc =
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| 	    CKSEG0ADDR(kvm_mips_translate_guest_kseg0_to_hpa
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| 		       (vcpu, (unsigned long) opc));
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| 	memcpy((void *)kseg0_opc, (void *)&synci_inst, sizeof(uint32_t));
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| 	local_flush_icache_range(kseg0_opc, kseg0_opc + 32);
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| 
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| 	return result;
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| }
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| 
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| int kvm_mips_trans_mfc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu)
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| {
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| 	int32_t rt, rd, sel;
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| 	uint32_t mfc0_inst;
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| 	unsigned long kseg0_opc, flags;
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| 
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| 	rt = (inst >> 16) & 0x1f;
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| 	rd = (inst >> 11) & 0x1f;
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| 	sel = inst & 0x7;
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| 
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| 	if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) {
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| 		mfc0_inst = CLEAR_TEMPLATE;
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| 		mfc0_inst |= ((rt & 0x1f) << 16);
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| 	} else {
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| 		mfc0_inst = LW_TEMPLATE;
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| 		mfc0_inst |= ((rt & 0x1f) << 16);
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| 		mfc0_inst |=
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| 		    offsetof(struct mips_coproc,
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| 			     reg[rd][sel]) + offsetof(struct kvm_mips_commpage,
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| 						      cop0);
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| 	}
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| 
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| 	if (KVM_GUEST_KSEGX(opc) == KVM_GUEST_KSEG0) {
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| 		kseg0_opc =
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| 		    CKSEG0ADDR(kvm_mips_translate_guest_kseg0_to_hpa
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| 			       (vcpu, (unsigned long) opc));
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| 		memcpy((void *)kseg0_opc, (void *)&mfc0_inst, sizeof(uint32_t));
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| 		local_flush_icache_range(kseg0_opc, kseg0_opc + 32);
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| 	} else if (KVM_GUEST_KSEGX((unsigned long) opc) == KVM_GUEST_KSEG23) {
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| 		local_irq_save(flags);
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| 		memcpy((void *)opc, (void *)&mfc0_inst, sizeof(uint32_t));
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| 		local_flush_icache_range((unsigned long)opc,
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| 					 (unsigned long)opc + 32);
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| 		local_irq_restore(flags);
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| 	} else {
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| 		kvm_err("%s: Invalid address: %p\n", __func__, opc);
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| 		return -EFAULT;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| int kvm_mips_trans_mtc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu)
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| {
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| 	int32_t rt, rd, sel;
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| 	uint32_t mtc0_inst = SW_TEMPLATE;
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| 	unsigned long kseg0_opc, flags;
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| 
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| 	rt = (inst >> 16) & 0x1f;
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| 	rd = (inst >> 11) & 0x1f;
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| 	sel = inst & 0x7;
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| 
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| 	mtc0_inst |= ((rt & 0x1f) << 16);
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| 	mtc0_inst |=
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| 	    offsetof(struct mips_coproc,
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| 		     reg[rd][sel]) + offsetof(struct kvm_mips_commpage, cop0);
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| 
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| 	if (KVM_GUEST_KSEGX(opc) == KVM_GUEST_KSEG0) {
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| 		kseg0_opc =
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| 		    CKSEG0ADDR(kvm_mips_translate_guest_kseg0_to_hpa
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| 			       (vcpu, (unsigned long) opc));
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| 		memcpy((void *)kseg0_opc, (void *)&mtc0_inst, sizeof(uint32_t));
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| 		local_flush_icache_range(kseg0_opc, kseg0_opc + 32);
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| 	} else if (KVM_GUEST_KSEGX((unsigned long) opc) == KVM_GUEST_KSEG23) {
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| 		local_irq_save(flags);
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| 		memcpy((void *)opc, (void *)&mtc0_inst, sizeof(uint32_t));
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| 		local_flush_icache_range((unsigned long)opc,
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| 					 (unsigned long)opc + 32);
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| 		local_irq_restore(flags);
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| 	} else {
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| 		kvm_err("%s: Invalid address: %p\n", __func__, opc);
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| 		return -EFAULT;
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| 	}
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| 
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| 	return 0;
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| }
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