304acb717e
Rework `process_fpemu_return' and move IEEE 754 exception interpretation there, from `do_fpe'. Record the cause bits set in FCSR before they are cleared and pass them through to `process_fpemu_return' so as to set `si_code' correctly too for SIGFPE signals sent from emulation rather than those issued by hardware with the FPE processor exception only. For simplicity `mipsr2_decoder' assumes `*fcr31' has been preinitialised and only sets it to anything if an FPU instruction has been emulated, which in turn is the only case SIGFPE can be issued for here. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
101 lines
2 KiB
C
101 lines
2 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2014 Imagination Technologies Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*/
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#ifndef __ASM_MIPS_R2_TO_R6_EMUL_H
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#define __ASM_MIPS_R2_TO_R6_EMUL_H
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struct mips_r2_emulator_stats {
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u64 movs;
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u64 hilo;
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u64 muls;
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u64 divs;
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u64 dsps;
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u64 bops;
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u64 traps;
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u64 fpus;
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u64 loads;
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u64 stores;
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u64 llsc;
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u64 dsemul;
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};
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struct mips_r2br_emulator_stats {
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u64 jrs;
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u64 bltzl;
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u64 bgezl;
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u64 bltzll;
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u64 bgezll;
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u64 bltzall;
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u64 bgezall;
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u64 bltzal;
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u64 bgezal;
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u64 beql;
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u64 bnel;
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u64 blezl;
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u64 bgtzl;
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};
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#ifdef CONFIG_DEBUG_FS
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#define MIPS_R2_STATS(M) \
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do { \
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u32 nir; \
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int err; \
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\
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preempt_disable(); \
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__this_cpu_inc(mipsr2emustats.M); \
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err = __get_user(nir, (u32 __user *)regs->cp0_epc); \
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if (!err) { \
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if (nir == BREAK_MATH) \
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__this_cpu_inc(mipsr2bdemustats.M); \
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} \
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preempt_enable(); \
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} while (0)
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#define MIPS_R2BR_STATS(M) \
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do { \
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preempt_disable(); \
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__this_cpu_inc(mipsr2bremustats.M); \
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preempt_enable(); \
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} while (0)
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#else
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#define MIPS_R2_STATS(M) do { } while (0)
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#define MIPS_R2BR_STATS(M) do { } while (0)
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#endif /* CONFIG_DEBUG_FS */
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struct r2_decoder_table {
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u32 mask;
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u32 code;
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int (*func)(struct pt_regs *regs, u32 inst);
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};
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extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
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const char *str);
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#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
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static int mipsr2_emulation;
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static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31)
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{
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return 0;
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};
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#else
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/* MIPS R2 Emulator ON/OFF */
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extern int mipsr2_emulation;
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extern int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31);
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#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
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#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
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#endif /* __ASM_MIPS_R2_TO_R6_EMUL_H */
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