There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo <t-kristo@ti.com>
		
			
				
	
	
		
			78 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			78 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * OMAP2+ Clock Management prototypes
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 *
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 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
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 * Copyright (C) 2007-2009 Nokia Corporation
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 *
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 * Written by Paul Walmsley
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 */
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#ifndef __ARCH_ASM_MACH_OMAP2_CM_H
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#define __ARCH_ASM_MACH_OMAP2_CM_H
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/*
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 * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the
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 * PRCM to request that a module exit the inactive state in the case of
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 * OMAP2 & 3.
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 * In the case of OMAP4 this is the max duration in microseconds for the
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 * module to reach the functionnal state from an inactive state.
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 */
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#define MAX_MODULE_READY_TIME		2000
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# ifndef __ASSEMBLER__
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extern void __iomem *cm_base;
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extern void __iomem *cm2_base;
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extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
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# endif
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/*
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 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
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 * the PRCM to request that a module enter the inactive state in the
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 * case of OMAP2 & 3.  In the case of OMAP4 this is the max duration
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 * in microseconds for the module to reach the inactive state from
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 * a functional state.
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 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
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 * kernel init.
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 */
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#define MAX_MODULE_DISABLE_TIME		5000
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# ifndef __ASSEMBLER__
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/**
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 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
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 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
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 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
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 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
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 * @module_enable: ptr to the SoC CM-specific module_enable impl
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 * @module_disable: ptr to the SoC CM-specific module_disable impl
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 */
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struct cm_ll_data {
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	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
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				u8 *idlest_reg_id);
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	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
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				 u8 idlest_shift);
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	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
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				u8 idlest_shift);
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	void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
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	void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
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};
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extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
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			       u8 *idlest_reg_id);
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int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
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			      u8 idlest_shift);
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int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
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			     u8 idlest_shift);
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int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
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int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
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extern int cm_register(struct cm_ll_data *cld);
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extern int cm_unregister(struct cm_ll_data *cld);
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int omap_cm_init(void);
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int omap2_cm_base_init(void);
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# endif
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#endif
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