ec7ac6afd0
With commit 9df62f0544 "arch: use ASM_NL instead of ';'" the generic
macros can handle the arch specific newline quirk. Hence we can get rid
of ARC asm macros and use the "C" style macros.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
70 lines
1.5 KiB
ArmAsm
70 lines
1.5 KiB
ArmAsm
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* If dst and src are 4 byte aligned, copy 8 bytes at a time.
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If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
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it 8 byte aligned. Thus, we can do a little read-ahead, without
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dereferencing a cache line that we should not touch.
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Note that short and long instructions have been scheduled to avoid
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branch stalls.
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The beq_s to r3z could be made unaligned & long to avoid a stall
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there, but the it is not likely to be taken often, and it
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would also be likey to cost an unaligned mispredict at the next call. */
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#include <linux/linkage.h>
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ENTRY(strcpy)
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or r2,r0,r1
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bmsk_s r2,r2,1
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brne.d r2,0,charloop
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mov_s r10,r0
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ld_s r3,[r1,0]
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mov r8,0x01010101
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bbit0.d r1,2,loop_start
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ror r12,r8
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sub r2,r3,r8
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bic_s r2,r2,r3
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tst_s r2,r12
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bne r3z
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mov_s r4,r3
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.balign 4
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loop:
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ld.a r3,[r1,4]
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st.ab r4,[r10,4]
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loop_start:
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ld.a r4,[r1,4]
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sub r2,r3,r8
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bic_s r2,r2,r3
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tst_s r2,r12
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bne_s r3z
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st.ab r3,[r10,4]
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sub r2,r4,r8
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bic r2,r2,r4
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tst r2,r12
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beq loop
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mov_s r3,r4
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#ifdef __LITTLE_ENDIAN__
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r3z: bmsk.f r1,r3,7
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lsr_s r3,r3,8
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#else
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r3z: lsr.f r1,r3,24
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asl_s r3,r3,8
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#endif
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bne.d r3z
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stb.ab r1,[r10,1]
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j_s [blink]
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.balign 4
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charloop:
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ldb.ab r3,[r1,1]
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brne.d r3,0,charloop
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stb.ab r3,[r10,1]
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j [blink]
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END(strcpy)
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