ecbbed32e7
Preparation for updating common->macaddr along with virtual interface MAC address changes. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
190 lines
6.4 KiB
C
190 lines
6.4 KiB
C
/*
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* Copyright (c) 2009 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/export.h>
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#include <asm/unaligned.h>
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#include "ath.h"
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#include "reg.h"
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#define REG_READ (common->ops->read)
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#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
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/**
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* ath_hw_set_bssid_mask - filter out bssids we listen
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*
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* @common: the ath_common struct for the device.
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*
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* BSSID masking is a method used by AR5212 and newer hardware to inform PCU
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* which bits of the interface's MAC address should be looked at when trying
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* to decide which packets to ACK. In station mode and AP mode with a single
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* BSS every bit matters since we lock to only one BSS. In AP mode with
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* multiple BSSes (virtual interfaces) not every bit matters because hw must
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* accept frames for all BSSes and so we tweak some bits of our mac address
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* in order to have multiple BSSes.
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*
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* NOTE: This is a simple filter and does *not* filter out all
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* relevant frames. Some frames that are not for us might get ACKed from us
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* by PCU because they just match the mask.
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*
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* When handling multiple BSSes you can get the BSSID mask by computing the
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* set of ~ ( MAC XOR BSSID ) for all bssids we handle.
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*
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* When you do this you are essentially computing the common bits of all your
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* BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
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* the MAC address to obtain the relevant bits and compare the result with
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* (frame's BSSID & mask) to see if they match.
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*
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* Simple example: on your card you have have two BSSes you have created with
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* BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
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* There is another BSSID-03 but you are not part of it. For simplicity's sake,
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* assuming only 4 bits for a mac address and for BSSIDs you can then have:
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*
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* \
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* MAC: 0001 |
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* BSSID-01: 0100 | --> Belongs to us
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* BSSID-02: 1001 |
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* /
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* -------------------
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* BSSID-03: 0110 | --> External
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* -------------------
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*
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* Our bssid_mask would then be:
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*
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* On loop iteration for BSSID-01:
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* ~(0001 ^ 0100) -> ~(0101)
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* -> 1010
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* bssid_mask = 1010
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*
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* On loop iteration for BSSID-02:
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* bssid_mask &= ~(0001 ^ 1001)
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* bssid_mask = (1010) & ~(0001 ^ 1001)
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* bssid_mask = (1010) & ~(1000)
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* bssid_mask = (1010) & (0111)
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* bssid_mask = 0010
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*
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* A bssid_mask of 0010 means "only pay attention to the second least
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* significant bit". This is because its the only bit common
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* amongst the MAC and all BSSIDs we support. To findout what the real
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* common bit is we can simply "&" the bssid_mask now with any BSSID we have
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* or our MAC address (we assume the hardware uses the MAC address).
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*
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* Now, suppose there's an incoming frame for BSSID-03:
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*
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* IFRAME-01: 0110
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*
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* An easy eye-inspeciton of this already should tell you that this frame
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* will not pass our check. This is because the bssid_mask tells the
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* hardware to only look at the second least significant bit and the
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* common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
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* as 1, which does not match 0.
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*
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* So with IFRAME-01 we *assume* the hardware will do:
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*
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* allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
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* --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
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* --> allow = (0010) == 0000 ? 1 : 0;
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* --> allow = 0
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*
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* Lets now test a frame that should work:
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*
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* IFRAME-02: 0001 (we should allow)
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*
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* allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
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* --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
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* --> allow = (0000) == (0000)
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* --> allow = 1
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*
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* Other examples:
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*
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* IFRAME-03: 0100 --> allowed
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* IFRAME-04: 1001 --> allowed
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* IFRAME-05: 1101 --> allowed but its not for us!!!
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*
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*/
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void ath_hw_setbssidmask(struct ath_common *common)
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{
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void *ah = common->ah;
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u32 id1;
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REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
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id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
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id1 |= get_unaligned_le16(common->macaddr + 4);
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REG_WRITE(ah, AR_STA_ID1, id1);
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REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
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REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
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}
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EXPORT_SYMBOL(ath_hw_setbssidmask);
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/**
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* ath_hw_cycle_counters_update - common function to update cycle counters
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*
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* @common: the ath_common struct for the device.
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*
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* This function is used to update all cycle counters in one place.
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* It has to be called while holding common->cc_lock!
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*/
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void ath_hw_cycle_counters_update(struct ath_common *common)
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{
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u32 cycles, busy, rx, tx;
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void *ah = common->ah;
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/* freeze */
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REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
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/* read */
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cycles = REG_READ(ah, AR_CCCNT);
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busy = REG_READ(ah, AR_RCCNT);
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rx = REG_READ(ah, AR_RFCNT);
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tx = REG_READ(ah, AR_TFCNT);
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/* clear */
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REG_WRITE(ah, AR_CCCNT, 0);
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REG_WRITE(ah, AR_RFCNT, 0);
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REG_WRITE(ah, AR_RCCNT, 0);
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REG_WRITE(ah, AR_TFCNT, 0);
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/* unfreeze */
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REG_WRITE(ah, AR_MIBC, 0);
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/* update all cycle counters here */
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common->cc_ani.cycles += cycles;
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common->cc_ani.rx_busy += busy;
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common->cc_ani.rx_frame += rx;
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common->cc_ani.tx_frame += tx;
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common->cc_survey.cycles += cycles;
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common->cc_survey.rx_busy += busy;
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common->cc_survey.rx_frame += rx;
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common->cc_survey.tx_frame += tx;
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}
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EXPORT_SYMBOL(ath_hw_cycle_counters_update);
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int32_t ath_hw_get_listen_time(struct ath_common *common)
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{
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struct ath_cycle_counters *cc = &common->cc_ani;
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int32_t listen_time;
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listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
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(common->clockrate * 1000);
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memset(cc, 0, sizeof(*cc));
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return listen_time;
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}
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EXPORT_SYMBOL(ath_hw_get_listen_time);
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