d74d5d1b72
While comparing the OMAP-serial and the 8250 part of this I noticed that the latter does not use run time-pm. Here are the pieces. It is basically a get before first register access and a last_busy + put after last access. This has to be enabled from userland _and_ UART_CAP_RPM is required for this. The runtime PM can usually work transparently in the background however there is one exception to this: After serial8250_tx_chars() completes there still may be unsent bytes in the FIFO (depending on CPU speed vs baud rate + flow control). Even if the TTY-buffer is empty we do not want RPM to disable the device because it won't send the remaining bytes. Instead we leave serial8250_tx_chars() with RPM enabled and wait for the FIFO empty interrupt. Once we enter serial8250_tx_chars() with an empty buffer we know that the FIFO is empty and since we are not going to send anything, we can disable the device. That xchg() is to ensure that serial8250_tx_chars() can be called multiple times and only the first invocation will actually invoke the runtime PM function. So that the last invocation of __stop_tx() will disable runtime pm. NOTE: do not enable RPM on the device unless you know what you do! If the device goes idle, it won't be woken up by incomming RX data _unless_ there is a wakeup irq configured which is usually the RX pin configure for wakeup via the reset module. The RX activity will then wake up the device from idle. However the first character is garbage and lost. The following bytes will be received once the device is up in time. On the beagle board xm (omap3) it takes approx 13ms from the first wakeup byte until the first byte that is received properly if the device was in core-off. v5…v8: - drop RPM from serial8250_set_mctrl() it will be used in restore path which already has RPM active and holds dev->power.lock v4…v5: - add a wrapper around rpm function and introduce UART_CAP_RPM to ensure RPM put is invoked after the TX FIFO is empty. v3…v4: - added runtime to the console code - removed device_may_wakeup() from serial8250_set_sleep() Cc: mika.westerberg@linux.intel.com Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
193 lines
4.7 KiB
C
193 lines
4.7 KiB
C
/*
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* Driver for 8250/16550-type serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Copyright (C) 2001 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/dmaengine.h>
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struct uart_8250_dma {
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dma_filter_fn fn;
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void *rx_param;
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void *tx_param;
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int rx_chan_id;
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int tx_chan_id;
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struct dma_slave_config rxconf;
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struct dma_slave_config txconf;
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struct dma_chan *rxchan;
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struct dma_chan *txchan;
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dma_addr_t rx_addr;
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dma_addr_t tx_addr;
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dma_cookie_t rx_cookie;
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dma_cookie_t tx_cookie;
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void *rx_buf;
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size_t rx_size;
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size_t tx_size;
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unsigned char tx_running:1;
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};
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struct old_serial_port {
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unsigned int uart;
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unsigned int baud_base;
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unsigned int port;
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unsigned int irq;
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unsigned int flags;
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unsigned char hub6;
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unsigned char io_type;
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unsigned char *iomem_base;
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unsigned short iomem_reg_shift;
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unsigned long irqflags;
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};
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struct serial8250_config {
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const char *name;
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unsigned short fifo_size;
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unsigned short tx_loadsz;
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unsigned char fcr;
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unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
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unsigned int flags;
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};
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#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
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#define UART_CAP_EFR (1 << 9) /* UART has EFR */
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#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
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#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
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#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
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#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
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#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
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#define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
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#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
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#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
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#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
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#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
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#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
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#define PROBE_RSA (1 << 0)
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#define PROBE_ANY (~0)
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#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
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#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
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#define SERIAL8250_SHARE_IRQS 1
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#else
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#define SERIAL8250_SHARE_IRQS 0
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#endif
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static inline int serial_in(struct uart_8250_port *up, int offset)
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{
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return up->port.serial_in(&up->port, offset);
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}
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static inline void serial_out(struct uart_8250_port *up, int offset, int value)
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{
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up->port.serial_out(&up->port, offset, value);
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}
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void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
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static inline int serial_dl_read(struct uart_8250_port *up)
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{
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return up->dl_read(up);
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}
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static inline void serial_dl_write(struct uart_8250_port *up, int value)
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{
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up->dl_write(up, value);
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}
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struct uart_8250_port *serial8250_get_port(int line);
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#if defined(__alpha__) && !defined(CONFIG_PCI)
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/*
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* Digital did something really horribly wrong with the OUT1 and OUT2
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* lines on at least some ALPHA's. The failure mode is that if either
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* is cleared, the machine locks up with endless interrupts.
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*/
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#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
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#else
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#define ALPHA_KLUDGE_MCR 0
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#endif
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#ifdef CONFIG_SERIAL_8250_PNP
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int serial8250_pnp_init(void);
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void serial8250_pnp_exit(void);
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#else
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static inline int serial8250_pnp_init(void) { return 0; }
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static inline void serial8250_pnp_exit(void) { }
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#endif
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#ifdef CONFIG_ARCH_OMAP1
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static inline int is_omap1_8250(struct uart_8250_port *pt)
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{
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int res;
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switch (pt->port.mapbase) {
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case OMAP1_UART1_BASE:
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case OMAP1_UART2_BASE:
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case OMAP1_UART3_BASE:
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res = 1;
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break;
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default:
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res = 0;
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break;
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}
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return res;
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}
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static inline int is_omap1510_8250(struct uart_8250_port *pt)
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{
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if (!cpu_is_omap1510())
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return 0;
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return is_omap1_8250(pt);
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}
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#else
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static inline int is_omap1_8250(struct uart_8250_port *pt)
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{
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return 0;
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}
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static inline int is_omap1510_8250(struct uart_8250_port *pt)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SERIAL_8250_DMA
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extern int serial8250_tx_dma(struct uart_8250_port *);
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extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir);
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extern int serial8250_request_dma(struct uart_8250_port *);
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extern void serial8250_release_dma(struct uart_8250_port *);
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#else
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static inline int serial8250_tx_dma(struct uart_8250_port *p)
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{
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return -1;
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}
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static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
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{
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return -1;
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}
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static inline int serial8250_request_dma(struct uart_8250_port *p)
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{
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return -1;
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}
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static inline void serial8250_release_dma(struct uart_8250_port *p) { }
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#endif
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