 b06c698716
			
		
	
	
	b06c698716
	
	
	
		
			
			If max77686 chip is instantiated from device tree, it is desirable to have an OF clock provider to allow device tree based look-up of clocks. This patch adds OF clock provider registration to the clk-max77686 driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
		
			
				
	
	
		
			252 lines
		
	
	
	
		
			6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			252 lines
		
	
	
	
		
			6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * clk-max77686.c - Clock driver for Maxim 77686
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|  *
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|  * Copyright (C) 2012 Samsung Electornics
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|  * Jonghwa Lee <jonghwa3.lee@samsung.com>
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|  *
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|  * This program is free software; you can redistribute  it and/or modify it
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|  * under  the terms of  the GNU General  Public License as published by the
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|  * Free Software Foundation;  either version 2 of the  License, or (at your
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|  * option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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|  *
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/slab.h>
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| #include <linux/err.h>
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| #include <linux/platform_device.h>
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| #include <linux/mfd/max77686.h>
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| #include <linux/mfd/max77686-private.h>
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| #include <linux/clk-provider.h>
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| #include <linux/mutex.h>
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| #include <linux/clkdev.h>
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| 
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| enum {
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| 	MAX77686_CLK_AP = 0,
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| 	MAX77686_CLK_CP,
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| 	MAX77686_CLK_PMIC,
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| 	MAX77686_CLKS_NUM,
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| };
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| 
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| struct max77686_clk {
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| 	struct max77686_dev *iodev;
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| 	u32 mask;
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| 	struct clk_hw hw;
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| 	struct clk_lookup *lookup;
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| };
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| 
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| static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
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| {
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| 	return container_of(hw, struct max77686_clk, hw);
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| }
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| 
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| static int max77686_clk_prepare(struct clk_hw *hw)
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| {
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| 	struct max77686_clk *max77686 = to_max77686_clk(hw);
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| 
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| 	return regmap_update_bits(max77686->iodev->regmap,
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| 				  MAX77686_REG_32KHZ, max77686->mask,
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| 				  max77686->mask);
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| }
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| 
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| static void max77686_clk_unprepare(struct clk_hw *hw)
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| {
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| 	struct max77686_clk *max77686 = to_max77686_clk(hw);
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| 
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| 	regmap_update_bits(max77686->iodev->regmap,
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| 		MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
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| }
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| 
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| static int max77686_clk_is_prepared(struct clk_hw *hw)
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| {
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| 	struct max77686_clk *max77686 = to_max77686_clk(hw);
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| 	int ret;
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| 	u32 val;
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| 
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| 	ret = regmap_read(max77686->iodev->regmap,
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| 				MAX77686_REG_32KHZ, &val);
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| 
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| 	if (ret < 0)
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| 		return -EINVAL;
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| 
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| 	return val & max77686->mask;
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| }
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| 
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| static unsigned long max77686_recalc_rate(struct clk_hw *hw,
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| 					  unsigned long parent_rate)
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| {
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| 	return 32768;
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| }
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| 
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| static struct clk_ops max77686_clk_ops = {
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| 	.prepare	= max77686_clk_prepare,
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| 	.unprepare	= max77686_clk_unprepare,
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| 	.is_prepared	= max77686_clk_is_prepared,
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| 	.recalc_rate	= max77686_recalc_rate,
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| };
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| 
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| static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
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| 	[MAX77686_CLK_AP] = {
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| 		.name = "32khz_ap",
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| 		.ops = &max77686_clk_ops,
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| 		.flags = CLK_IS_ROOT,
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| 	},
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| 	[MAX77686_CLK_CP] = {
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| 		.name = "32khz_cp",
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| 		.ops = &max77686_clk_ops,
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| 		.flags = CLK_IS_ROOT,
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| 	},
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| 	[MAX77686_CLK_PMIC] = {
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| 		.name = "32khz_pmic",
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| 		.ops = &max77686_clk_ops,
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| 		.flags = CLK_IS_ROOT,
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| 	},
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| };
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| 
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| static struct clk *max77686_clk_register(struct device *dev,
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| 				struct max77686_clk *max77686)
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| {
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| 	struct clk *clk;
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| 	struct clk_hw *hw = &max77686->hw;
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| 
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| 	clk = clk_register(dev, hw);
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| 	if (IS_ERR(clk))
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| 		return clk;
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| 
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| 	max77686->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
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| 	if (!max77686->lookup)
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| 		return ERR_PTR(-ENOMEM);
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| 
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| 	max77686->lookup->con_id = hw->init->name;
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| 	max77686->lookup->clk = clk;
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| 
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| 	clkdev_add(max77686->lookup);
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| 
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| 	return clk;
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| }
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| 
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| static int max77686_clk_probe(struct platform_device *pdev)
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| {
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| 	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
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| 	struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
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| 	struct clk **clocks;
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| 	int i, ret;
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| 
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| 	clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
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| 					* MAX77686_CLKS_NUM, GFP_KERNEL);
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| 	if (!clocks)
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| 		return -ENOMEM;
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| 
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| 	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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| 		max77686_clks[i] = devm_kzalloc(&pdev->dev,
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| 					sizeof(struct max77686_clk), GFP_KERNEL);
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| 		if (!max77686_clks[i])
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| 			return -ENOMEM;
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| 	}
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| 
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| 	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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| 		max77686_clks[i]->iodev = iodev;
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| 		max77686_clks[i]->mask = 1 << i;
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| 		max77686_clks[i]->hw.init = &max77686_clks_init[i];
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| 
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| 		clocks[i] = max77686_clk_register(&pdev->dev, max77686_clks[i]);
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| 		if (IS_ERR(clocks[i])) {
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| 			ret = PTR_ERR(clocks[i]);
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| 			dev_err(&pdev->dev, "failed to register %s\n",
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| 				max77686_clks[i]->hw.init->name);
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| 			goto err_clocks;
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| 		}
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| 	}
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| 
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| 	platform_set_drvdata(pdev, clocks);
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| 
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| 	if (iodev->dev->of_node) {
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| 		struct clk_onecell_data *of_data;
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| 
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| 		of_data = devm_kzalloc(&pdev->dev,
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| 					sizeof(*of_data), GFP_KERNEL);
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| 		if (!of_data) {
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| 			ret = -ENOMEM;
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| 			goto err_clocks;
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| 		}
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| 
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| 		of_data->clks = clocks;
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| 		of_data->clk_num = MAX77686_CLKS_NUM;
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| 		ret = of_clk_add_provider(iodev->dev->of_node,
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| 					of_clk_src_onecell_get, of_data);
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| 		if (ret) {
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| 			dev_err(&pdev->dev, "failed to register OF clock provider\n");
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| 			goto err_clocks;
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| 		}
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| 	}
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| 
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| 	return 0;
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| 
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| err_clocks:
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| 	for (--i; i >= 0; --i) {
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| 		clkdev_drop(max77686_clks[i]->lookup);
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| 		clk_unregister(max77686_clks[i]->hw.clk);
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| 	}
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| 
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| 	return ret;
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| }
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| 
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| static int max77686_clk_remove(struct platform_device *pdev)
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| {
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| 	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
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| 	struct clk **clocks = platform_get_drvdata(pdev);
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| 	int i;
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| 
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| 	if (iodev->dev->of_node)
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| 		of_clk_del_provider(iodev->dev->of_node);
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| 
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| 	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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| 		struct clk_hw *hw = __clk_get_hw(clocks[i]);
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| 		struct max77686_clk *max77686 = to_max77686_clk(hw);
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| 
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| 		clkdev_drop(max77686->lookup);
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| 		clk_unregister(clocks[i]);
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| 	}
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| 	return 0;
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| }
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| 
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| static const struct platform_device_id max77686_clk_id[] = {
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| 	{ "max77686-clk", 0},
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| 	{ },
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| };
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| MODULE_DEVICE_TABLE(platform, max77686_clk_id);
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| 
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| static struct platform_driver max77686_clk_driver = {
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| 	.driver = {
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| 		.name  = "max77686-clk",
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| 		.owner = THIS_MODULE,
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| 	},
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| 	.probe = max77686_clk_probe,
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| 	.remove = max77686_clk_remove,
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| 	.id_table = max77686_clk_id,
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| };
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| 
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| static int __init max77686_clk_init(void)
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| {
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| 	return platform_driver_register(&max77686_clk_driver);
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| }
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| subsys_initcall(max77686_clk_init);
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| 
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| static void __init max77686_clk_cleanup(void)
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| {
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| 	platform_driver_unregister(&max77686_clk_driver);
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| }
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| module_exit(max77686_clk_cleanup);
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| 
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| MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
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| MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
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| MODULE_LICENSE("GPL");
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