 80eded6ce8
			
		
	
	
	80eded6ce8
	
	
	
		
			
			AT91 slow clk is a clk multiplexer. In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can choose among 2 sources: an internal RC oscillator circuit and an oscillator using an external crystal. In other Socs (sam9260 family) the multiplexer source is hardcoded with the OSCSEL signal. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
		
			
				
	
	
		
			57 lines
		
	
	
	
		
			1.4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
	
		
			1.4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * drivers/clk/at91/sckc.c
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|  *
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|  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  */
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| 
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| #include <linux/clk-provider.h>
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| #include <linux/clkdev.h>
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| #include <linux/of.h>
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| #include <linux/of_address.h>
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| #include <linux/io.h>
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| 
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| #include "sckc.h"
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| 
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| static const struct of_device_id sckc_clk_ids[] __initconst = {
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| 	/* Slow clock */
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| 	{
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| 		.compatible = "atmel,at91sam9x5-clk-slow-osc",
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| 		.data = of_at91sam9x5_clk_slow_osc_setup,
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| 	},
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| 	{
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| 		.compatible = "atmel,at91sam9x5-clk-slow-rc-osc",
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| 		.data = of_at91sam9x5_clk_slow_rc_osc_setup,
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| 	},
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| 	{
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| 		.compatible = "atmel,at91sam9x5-clk-slow",
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| 		.data = of_at91sam9x5_clk_slow_setup,
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| 	},
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| 	{ /*sentinel*/ }
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| };
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| 
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| static void __init of_at91sam9x5_sckc_setup(struct device_node *np)
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| {
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| 	struct device_node *childnp;
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| 	void (*clk_setup)(struct device_node *, void __iomem *);
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| 	const struct of_device_id *clk_id;
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| 	void __iomem *regbase = of_iomap(np, 0);
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| 
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| 	if (!regbase)
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| 		return;
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| 
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| 	for_each_child_of_node(np, childnp) {
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| 		clk_id = of_match_node(sckc_clk_ids, childnp);
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| 		if (!clk_id)
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| 			continue;
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| 		clk_setup = clk_id->data;
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| 		clk_setup(childnp, regbase);
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| 	}
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| }
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| CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc",
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| 	       of_at91sam9x5_sckc_setup);
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