Move the code to issue the set adapter device controls command to chsc.c and make it accessible for the qdio code via the wrapper chsc_sadc. Reviewed-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
		
			
				
	
	
		
			427 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			427 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright IBM Corp. 2000, 2009
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 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
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 *	      Jan Glauber <jang@linux.vnet.ibm.com>
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 */
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#ifndef _CIO_QDIO_H
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#define _CIO_QDIO_H
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#include <asm/page.h>
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#include <asm/schid.h>
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#include <asm/debug.h>
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#include "chsc.h"
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#define QDIO_BUSY_BIT_PATIENCE		(100 << 12)	/* 100 microseconds */
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#define QDIO_BUSY_BIT_RETRY_DELAY	10		/* 10 milliseconds */
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#define QDIO_BUSY_BIT_RETRIES		1000		/* = 10s retry time */
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#define QDIO_INPUT_THRESHOLD		(500 << 12)	/* 500 microseconds */
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enum qdio_irq_states {
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	QDIO_IRQ_STATE_INACTIVE,
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	QDIO_IRQ_STATE_ESTABLISHED,
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	QDIO_IRQ_STATE_ACTIVE,
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	QDIO_IRQ_STATE_STOPPED,
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	QDIO_IRQ_STATE_CLEANUP,
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	QDIO_IRQ_STATE_ERR,
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	NR_QDIO_IRQ_STATES,
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};
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/* used as intparm in do_IO */
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#define QDIO_DOING_ESTABLISH	1
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#define QDIO_DOING_ACTIVATE	2
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#define QDIO_DOING_CLEANUP	3
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#define SLSB_STATE_NOT_INIT	0x0
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#define SLSB_STATE_EMPTY	0x1
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#define SLSB_STATE_PRIMED	0x2
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#define SLSB_STATE_PENDING	0x3
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#define SLSB_STATE_HALTED	0xe
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#define SLSB_STATE_ERROR	0xf
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#define SLSB_TYPE_INPUT		0x0
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#define SLSB_TYPE_OUTPUT	0x20
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#define SLSB_OWNER_PROG		0x80
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#define SLSB_OWNER_CU		0x40
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#define SLSB_P_INPUT_NOT_INIT	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT)  /* 0x80 */
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#define SLSB_P_INPUT_ACK	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x81 */
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#define SLSB_CU_INPUT_EMPTY	\
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	(SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x41 */
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#define SLSB_P_INPUT_PRIMED	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED)	   /* 0x82 */
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#define SLSB_P_INPUT_HALTED	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED)	   /* 0x8e */
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#define SLSB_P_INPUT_ERROR	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR)	   /* 0x8f */
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#define SLSB_P_OUTPUT_NOT_INIT	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
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#define SLSB_P_OUTPUT_EMPTY	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY)	   /* 0xa1 */
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#define SLSB_P_OUTPUT_PENDING \
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	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING)  /* 0xa3 */
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#define SLSB_CU_OUTPUT_PRIMED	\
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	(SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED)	   /* 0x62 */
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#define SLSB_P_OUTPUT_HALTED	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED)   /* 0xae */
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#define SLSB_P_OUTPUT_ERROR	\
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	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR)	   /* 0xaf */
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#define SLSB_ERROR_DURING_LOOKUP  0xff
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/* additional CIWs returned by extended Sense-ID */
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#define CIW_TYPE_EQUEUE			0x3 /* establish QDIO queues */
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#define CIW_TYPE_AQUEUE			0x4 /* activate QDIO queues */
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/* flags for st qdio sch data */
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#define CHSC_FLAG_QDIO_CAPABILITY	0x80
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#define CHSC_FLAG_VALIDITY		0x40
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/* SIGA flags */
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#define QDIO_SIGA_WRITE		0x00
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#define QDIO_SIGA_READ		0x01
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#define QDIO_SIGA_SYNC		0x02
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#define QDIO_SIGA_WRITEQ	0x04
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#define QDIO_SIGA_QEBSM_FLAG	0x80
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#ifdef CONFIG_64BIT
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static inline int do_sqbs(u64 token, unsigned char state, int queue,
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			  int *start, int *count)
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{
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	register unsigned long _ccq asm ("0") = *count;
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	register unsigned long _token asm ("1") = token;
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	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
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	asm volatile(
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		"	.insn	rsy,0xeb000000008A,%1,0,0(%2)"
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		: "+d" (_ccq), "+d" (_queuestart)
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		: "d" ((unsigned long)state), "d" (_token)
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		: "memory", "cc");
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	*count = _ccq & 0xff;
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	*start = _queuestart & 0xff;
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	return (_ccq >> 32) & 0xff;
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}
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static inline int do_eqbs(u64 token, unsigned char *state, int queue,
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			  int *start, int *count, int ack)
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{
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	register unsigned long _ccq asm ("0") = *count;
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	register unsigned long _token asm ("1") = token;
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	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
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	unsigned long _state = (unsigned long)ack << 63;
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	asm volatile(
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		"	.insn	rrf,0xB99c0000,%1,%2,0,0"
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		: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
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		: "d" (_token)
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		: "memory", "cc");
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	*count = _ccq & 0xff;
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	*start = _queuestart & 0xff;
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	*state = _state & 0xff;
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	return (_ccq >> 32) & 0xff;
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}
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#else
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static inline int do_sqbs(u64 token, unsigned char state, int queue,
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			  int *start, int *count) { return 0; }
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static inline int do_eqbs(u64 token, unsigned char *state, int queue,
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			  int *start, int *count, int ack) { return 0; }
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#endif /* CONFIG_64BIT */
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struct qdio_irq;
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struct siga_flag {
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	u8 input:1;
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	u8 output:1;
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	u8 sync:1;
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	u8 sync_after_ai:1;
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	u8 sync_out_after_pci:1;
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	u8:3;
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} __attribute__ ((packed));
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struct qdio_dev_perf_stat {
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	unsigned int adapter_int;
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	unsigned int qdio_int;
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	unsigned int pci_request_int;
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	unsigned int tasklet_inbound;
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	unsigned int tasklet_inbound_resched;
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	unsigned int tasklet_inbound_resched2;
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	unsigned int tasklet_outbound;
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	unsigned int siga_read;
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	unsigned int siga_write;
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	unsigned int siga_sync;
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	unsigned int inbound_call;
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	unsigned int inbound_handler;
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	unsigned int stop_polling;
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	unsigned int inbound_queue_full;
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	unsigned int outbound_call;
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	unsigned int outbound_handler;
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	unsigned int outbound_queue_full;
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	unsigned int fast_requeue;
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	unsigned int target_full;
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	unsigned int eqbs;
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	unsigned int eqbs_partial;
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	unsigned int sqbs;
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	unsigned int sqbs_partial;
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	unsigned int int_discarded;
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} ____cacheline_aligned;
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struct qdio_queue_perf_stat {
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	/*
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	 * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128.
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	 * Since max. 127 SBALs are scanned reuse entry for 128 as queue full
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	 * aka 127 SBALs found.
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	 */
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	unsigned int nr_sbals[8];
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	unsigned int nr_sbal_error;
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	unsigned int nr_sbal_nop;
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	unsigned int nr_sbal_total;
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};
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enum qdio_queue_irq_states {
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	QDIO_QUEUE_IRQS_DISABLED,
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};
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struct qdio_input_q {
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	/* input buffer acknowledgement flag */
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	int polling;
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	/* first ACK'ed buffer */
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	int ack_start;
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	/* how much sbals are acknowledged with qebsm */
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	int ack_count;
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	/* last time of noticing incoming data */
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	u64 timestamp;
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	/* upper-layer polling flag */
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	unsigned long queue_irq_state;
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	/* callback to start upper-layer polling */
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	void (*queue_start_poll) (struct ccw_device *, int, unsigned long);
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};
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struct qdio_output_q {
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	/* PCIs are enabled for the queue */
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	int pci_out_enabled;
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	/* cq: use asynchronous output buffers */
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	int use_cq;
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	/* cq: aobs used for particual SBAL */
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	struct qaob **aobs;
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	/* cq: sbal state related to asynchronous operation */
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	struct qdio_outbuf_state *sbal_state;
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	/* timer to check for more outbound work */
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	struct timer_list timer;
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	/* used SBALs before tasklet schedule */
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	int scan_threshold;
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};
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/*
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 * Note on cache alignment: grouped slsb and write mostly data at the beginning
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 * sbal[] is read-only and starts on a new cacheline followed by read mostly.
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 */
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struct qdio_q {
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	struct slsb slsb;
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	union {
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		struct qdio_input_q in;
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		struct qdio_output_q out;
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	} u;
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	/*
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	 * inbound: next buffer the program should check for
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	 * outbound: next buffer to check if adapter processed it
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	 */
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	int first_to_check;
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	/* first_to_check of the last time */
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	int last_move;
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	/* beginning position for calling the program */
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	int first_to_kick;
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	/* number of buffers in use by the adapter */
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	atomic_t nr_buf_used;
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	/* error condition during a data transfer */
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	unsigned int qdio_error;
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	/* last scan of the queue */
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	u64 timestamp;
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	struct tasklet_struct tasklet;
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	struct qdio_queue_perf_stat q_stats;
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	struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
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	/* queue number */
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	int nr;
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	/* bitmask of queue number */
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	int mask;
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	/* input or output queue */
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	int is_input_q;
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	/* list of thinint input queues */
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	struct list_head entry;
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	/* upper-layer program handler */
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	qdio_handler_t (*handler);
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	struct dentry *debugfs_q;
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	struct qdio_irq *irq_ptr;
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	struct sl *sl;
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	/*
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	 * A page is allocated under this pointer and used for slib and sl.
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	 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
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	 */
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	struct slib *slib;
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} __attribute__ ((aligned(256)));
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struct qdio_irq {
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	struct qib qib;
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	u32 *dsci;		/* address of device state change indicator */
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	struct ccw_device *cdev;
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	struct dentry *debugfs_dev;
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	struct dentry *debugfs_perf;
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	unsigned long int_parm;
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	struct subchannel_id schid;
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	unsigned long sch_token;	/* QEBSM facility */
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	enum qdio_irq_states state;
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	struct siga_flag siga_flag;	/* siga sync information from qdioac */
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	int nr_input_qs;
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	int nr_output_qs;
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	struct ccw1 ccw;
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	struct ciw equeue;
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	struct ciw aqueue;
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	struct qdio_ssqd_desc ssqd_desc;
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	void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
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	int perf_stat_enabled;
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	struct qdr *qdr;
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	unsigned long chsc_page;
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	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
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	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
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	debug_info_t *debug_area;
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	struct mutex setup_mutex;
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	struct qdio_dev_perf_stat perf_stat;
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};
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/* helper functions */
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#define queue_type(q)	q->irq_ptr->qib.qfmt
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#define SCH_NO(q)	(q->irq_ptr->schid.sch_no)
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#define is_thinint_irq(irq) \
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	(irq->qib.qfmt == QDIO_IQDIO_QFMT || \
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	 css_general_characteristics.aif_osa)
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#define qperf(__qdev, __attr)	((__qdev)->perf_stat.(__attr))
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#define qperf_inc(__q, __attr)						\
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({									\
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	struct qdio_irq *qdev = (__q)->irq_ptr;				\
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	if (qdev->perf_stat_enabled)					\
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		(qdev->perf_stat.__attr)++;				\
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})
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static inline void account_sbals_error(struct qdio_q *q, int count)
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{
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	q->q_stats.nr_sbal_error += count;
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	q->q_stats.nr_sbal_total += count;
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}
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/* the highest iqdio queue is used for multicast */
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static inline int multicast_outbound(struct qdio_q *q)
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{
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	return (q->irq_ptr->nr_output_qs > 1) &&
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	       (q->nr == q->irq_ptr->nr_output_qs - 1);
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}
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#define pci_out_supported(q) \
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	(q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
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#define is_qebsm(q)			(q->irq_ptr->sch_token != 0)
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#define need_siga_in(q)			(q->irq_ptr->siga_flag.input)
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#define need_siga_out(q)		(q->irq_ptr->siga_flag.output)
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#define need_siga_sync(q)		(unlikely(q->irq_ptr->siga_flag.sync))
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#define need_siga_sync_after_ai(q)	\
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	(unlikely(q->irq_ptr->siga_flag.sync_after_ai))
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#define need_siga_sync_out_after_pci(q)	\
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	(unlikely(q->irq_ptr->siga_flag.sync_out_after_pci))
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#define for_each_input_queue(irq_ptr, q, i)	\
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	for (i = 0, q = irq_ptr->input_qs[0];	\
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		i < irq_ptr->nr_input_qs;	\
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		q = irq_ptr->input_qs[++i])
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#define for_each_output_queue(irq_ptr, q, i)	\
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	for (i = 0, q = irq_ptr->output_qs[0];	\
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		i < irq_ptr->nr_output_qs;	\
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		q = irq_ptr->output_qs[++i])
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#define prev_buf(bufnr)	\
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	((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
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#define next_buf(bufnr)	\
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	((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
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#define add_buf(bufnr, inc) \
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	((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
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#define sub_buf(bufnr, dec) \
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	((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
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#define queue_irqs_enabled(q)			\
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	(test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0)
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#define queue_irqs_disabled(q)			\
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	(test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0)
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extern u64 last_ai_time;
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/* prototypes for thin interrupt */
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void qdio_setup_thinint(struct qdio_irq *irq_ptr);
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int qdio_establish_thinint(struct qdio_irq *irq_ptr);
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void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
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void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
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void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
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void tiqdio_inbound_processing(unsigned long q);
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int tiqdio_allocate_memory(void);
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void tiqdio_free_memory(void);
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int tiqdio_register_thinints(void);
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void tiqdio_unregister_thinints(void);
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void clear_nonshared_ind(struct qdio_irq *);
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int test_nonshared_ind(struct qdio_irq *);
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/* prototypes for setup */
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void qdio_inbound_processing(unsigned long data);
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void qdio_outbound_processing(unsigned long data);
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void qdio_outbound_timer(unsigned long data);
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void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
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		      struct irb *irb);
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int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
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						|
		     int nr_output_qs);
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void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
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int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
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						|
			struct subchannel_id *schid,
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						|
			struct qdio_ssqd_desc *data);
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int qdio_setup_irq(struct qdio_initialize *init_data);
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void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
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						|
				struct ccw_device *cdev);
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void qdio_release_memory(struct qdio_irq *irq_ptr);
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int qdio_setup_create_sysfs(struct ccw_device *cdev);
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void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
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int qdio_setup_init(void);
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void qdio_setup_exit(void);
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int qdio_enable_async_operation(struct qdio_output_q *q);
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void qdio_disable_async_operation(struct qdio_output_q *q);
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struct qaob *qdio_allocate_aob(void);
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int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
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						|
			unsigned char *state);
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#endif /* _CIO_QDIO_H */
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