Code Aurora Forum (CAF) is becoming a part of Linux Foundation Labs. Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
		
			
				
	
	
		
			93 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			93 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Hexagon Virtual Machine TLB functions
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 *
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 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 and
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 * only version 2 as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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 * 02110-1301, USA.
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 */
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/*
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 * The Hexagon Virtual Machine conceals the real workings of
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 * the TLB, but there are one or two functions that need to
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 * be instantiated for it, differently from a native build.
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 */
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#include <linux/mm.h>
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#include <asm/page.h>
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#include <asm/hexagon_vm.h>
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/*
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 * Initial VM implementation has only one map active at a time, with
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 * TLB purgings on changes.  So either we're nuking the current map,
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 * or it's a no-op.  This operation is messy on true SMPs where other
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 * processors must be induced to flush the copies in their local TLBs,
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 * but Hexagon thread-based virtual processors share the same MMU.
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 */
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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			unsigned long end)
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{
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	struct mm_struct *mm = vma->vm_mm;
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	if (mm->context.ptbase == current->active_mm->context.ptbase)
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		__vmclrmap((void *)start, end - start);
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}
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/*
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 * Flush a page from the kernel virtual map - used by highmem
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 */
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void flush_tlb_one(unsigned long vaddr)
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{
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	__vmclrmap((void *)vaddr, PAGE_SIZE);
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}
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/*
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 * Flush all TLBs across all CPUs, virtual or real.
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 * A single Hexagon core has 6 thread contexts but
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 * only one TLB.
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 */
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void tlb_flush_all(void)
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{
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	/*  should probably use that fixaddr end or whateve label  */
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	__vmclrmap(0, 0xffff0000);
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}
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/*
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 * Flush TLB entries associated with a given mm_struct mapping.
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 */
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void flush_tlb_mm(struct mm_struct *mm)
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{
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	/* Current Virtual Machine has only one map active at a time */
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	if (current->active_mm->context.ptbase == mm->context.ptbase)
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		tlb_flush_all();
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}
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/*
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 * Flush TLB state associated with a page of a vma.
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 */
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long vaddr)
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{
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	struct mm_struct *mm = vma->vm_mm;
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	if (mm->context.ptbase  == current->active_mm->context.ptbase)
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		__vmclrmap((void *)vaddr, PAGE_SIZE);
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}
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/*
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 * Flush TLB entries associated with a kernel address range.
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 * Like flush range, but without the check on the vma->vm_mm.
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 */
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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		__vmclrmap((void *)start, end - start);
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}
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