029e9f7366
IA32-Intel Devel guide Volume 3A - 14.3.2.1 ------------------------------------------- ... Opportunistic processor performance operation can be disabled by setting bit 38 of IA32_MISC_ENABLES. This mechanism is intended for BIOS only. If IA32_MISC_ENABLES[38] is set, CPUID.06H:EAX[1] will return 0. Better detect things via cpuid, this cleans up the code a bit and the MSR parts were not working correctly anyway. Signed-off-by: Thomas Renninger <trenn@suse.de> CC: lenb@kernel.org CC: linux@dominikbrodowski.net CC: cpufreq@vger.kernel.org Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
27 lines
635 B
C
27 lines
635 B
C
#if defined(__i386__) || defined(__x86_64__)
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#include "helpers/helpers.h"
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int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,
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int *states)
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{
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struct cpupower_cpu_info cpu_info;
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int ret;
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*support = *active = *states = 0;
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ret = get_cpu_info(0, &cpu_info);
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if (ret)
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return ret;
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if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) {
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*support = 1;
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amd_pci_get_num_boost_states(active, states);
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if (ret <= 0)
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return ret;
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*support = 1;
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} else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA)
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*support = *active = 1;
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return 0;
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}
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#endif /* #if defined(__i386__) || defined(__x86_64__) */
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