 ddca156ae6
			
		
	
	
	ddca156ae6
	
	
	
		
			
			Use make_dsisr instead of open coding it. This also have the added benefit of handling alignment interrupt on additional instructions. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
		
			
				
	
	
		
			118 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			118 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License, version 2, as
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|  * published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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|  *
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|  * Copyright IBM Corp. 2008
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|  *
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|  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
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|  */
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| 
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| #ifndef __ASM_PPC_DISASSEMBLE_H__
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| #define __ASM_PPC_DISASSEMBLE_H__
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| 
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| #include <linux/types.h>
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| 
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| static inline unsigned int get_op(u32 inst)
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| {
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| 	return inst >> 26;
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| }
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| 
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| static inline unsigned int get_xop(u32 inst)
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| {
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| 	return (inst >> 1) & 0x3ff;
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| }
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| 
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| static inline unsigned int get_sprn(u32 inst)
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| {
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| 	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
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| }
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| 
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| static inline unsigned int get_dcrn(u32 inst)
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| {
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| 	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
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| }
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| 
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| static inline unsigned int get_rt(u32 inst)
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| {
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| 	return (inst >> 21) & 0x1f;
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| }
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| 
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| static inline unsigned int get_rs(u32 inst)
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| {
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| 	return (inst >> 21) & 0x1f;
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| }
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| 
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| static inline unsigned int get_ra(u32 inst)
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| {
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| 	return (inst >> 16) & 0x1f;
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| }
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| 
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| static inline unsigned int get_rb(u32 inst)
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| {
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| 	return (inst >> 11) & 0x1f;
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| }
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| 
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| static inline unsigned int get_rc(u32 inst)
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| {
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| 	return inst & 0x1;
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| }
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| 
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| static inline unsigned int get_ws(u32 inst)
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| {
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| 	return (inst >> 11) & 0x1f;
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| }
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| 
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| static inline unsigned int get_d(u32 inst)
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| {
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| 	return inst & 0xffff;
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| }
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| 
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| static inline unsigned int get_oc(u32 inst)
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| {
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| 	return (inst >> 11) & 0x7fff;
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| }
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| 
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| #define IS_XFORM(inst)	(get_op(inst)  == 31)
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| #define IS_DSFORM(inst)	(get_op(inst) >= 56)
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| 
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| /*
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|  * Create a DSISR value from the instruction
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|  */
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| static inline unsigned make_dsisr(unsigned instr)
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| {
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| 	unsigned dsisr;
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| 
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| 
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| 	/* bits  6:15 --> 22:31 */
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| 	dsisr = (instr & 0x03ff0000) >> 16;
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| 
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| 	if (IS_XFORM(instr)) {
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| 		/* bits 29:30 --> 15:16 */
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| 		dsisr |= (instr & 0x00000006) << 14;
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| 		/* bit     25 -->    17 */
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| 		dsisr |= (instr & 0x00000040) << 8;
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| 		/* bits 21:24 --> 18:21 */
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| 		dsisr |= (instr & 0x00000780) << 3;
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| 	} else {
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| 		/* bit      5 -->    17 */
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| 		dsisr |= (instr & 0x04000000) >> 12;
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| 		/* bits  1: 4 --> 18:21 */
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| 		dsisr |= (instr & 0x78000000) >> 17;
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| 		/* bits 30:31 --> 12:13 */
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| 		if (IS_DSFORM(instr))
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| 			dsisr |= (instr & 0x00000003) << 18;
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| 	}
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| 
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| 	return dsisr;
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| }
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| #endif /* __ASM_PPC_DISASSEMBLE_H__ */
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