6ebbf2ce43
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
100 lines
1.7 KiB
ArmAsm
100 lines
1.7 KiB
ArmAsm
/*
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* linux/arch/arm/lib/io-writesw-armv4.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.macro outword, rd
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#ifndef __ARMEB__
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strh \rd, [r0]
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mov \rd, \rd, lsr #16
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strh \rd, [r0]
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#else
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mov lr, \rd, lsr #16
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strh lr, [r0]
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strh \rd, [r0]
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#endif
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.endm
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.Loutsw_align: movs ip, r1, lsl #31
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bne .Loutsw_noalign
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ldrh r3, [r1], #2
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sub r2, r2, #1
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strh r3, [r0]
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ENTRY(__raw_writesw)
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teq r2, #0
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reteq lr
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ands r3, r1, #3
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bne .Loutsw_align
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stmfd sp!, {r4, r5, lr}
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subs r2, r2, #8
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bmi .Lno_outsw_8
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.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
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subs r2, r2, #8
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outword r3
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outword r4
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outword r5
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outword ip
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bpl .Loutsw_8_lp
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.Lno_outsw_8: tst r2, #4
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beq .Lno_outsw_4
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ldmia r1!, {r3, ip}
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outword r3
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outword ip
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.Lno_outsw_4: movs r2, r2, lsl #31
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bcc .Lno_outsw_2
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ldr r3, [r1], #4
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outword r3
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.Lno_outsw_2: ldrneh r3, [r1]
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strneh r3, [r0]
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ldmfd sp!, {r4, r5, pc}
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#ifdef __ARMEB__
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#define pull_hbyte0 lsl #8
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#define push_hbyte1 lsr #24
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#else
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#define pull_hbyte0 lsr #24
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#define push_hbyte1 lsl #8
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#endif
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.Loutsw_noalign:
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ARM( ldr r3, [r1, -r3]! )
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THUMB( rsb r3, r3, #0 )
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THUMB( ldr r3, [r1, r3] )
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THUMB( sub r1, r3 )
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subcs r2, r2, #1
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bcs 2f
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subs r2, r2, #2
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bmi 3f
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1: mov ip, r3, lsr #8
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strh ip, [r0]
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2: mov ip, r3, pull_hbyte0
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ldr r3, [r1, #4]!
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subs r2, r2, #2
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orr ip, ip, r3, push_hbyte1
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strh ip, [r0]
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bpl 1b
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tst r2, #1
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3: movne ip, r3, lsr #8
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strneh ip, [r0]
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ret lr
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ENDPROC(__raw_writesw)
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