92d9ae2026
On BCM6345, the register offsets for the set/get GPIO registers is wrong. Use the same logic as the one present in arch/mips/bcm63xx/irq.c to define the correct gpio_out_low_reg value when support for BCM6345 is compiled in. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3010/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
165 lines
3.5 KiB
C
165 lines
3.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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* Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_gpio.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_regs.h>
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#ifndef BCMCPU_RUNTIME_DETECT
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#define gpio_out_low_reg GPIO_DATA_LO_REG
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#ifdef CONFIG_BCM63XX_CPU_6345
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#ifdef gpio_out_low_reg
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#undef gpio_out_low_reg
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#define gpio_out_low_reg GPIO_DATA_LO_REG_6345
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#endif /* gpio_out_low_reg */
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#endif /* CONFIG_BCM63XX_CPU_6345 */
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static inline void bcm63xx_gpio_out_low_reg_init(void)
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{
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}
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#else /* ! BCMCPU_RUNTIME_DETECT */
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static u32 gpio_out_low_reg;
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static void bcm63xx_gpio_out_low_reg_init(void)
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{
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switch (bcm63xx_get_cpu_id()) {
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case BCM6345_CPU_ID:
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gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
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break;
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default:
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gpio_out_low_reg = GPIO_DATA_LO_REG;
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break;
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}
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}
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#endif /* ! BCMCPU_RUNTIME_DETECT */
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static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
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static u32 gpio_out_low, gpio_out_high;
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static void bcm63xx_gpio_set(struct gpio_chip *chip,
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unsigned gpio, int val)
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{
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u32 reg;
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u32 mask;
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u32 *v;
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unsigned long flags;
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if (gpio >= chip->ngpio)
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BUG();
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if (gpio < 32) {
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reg = gpio_out_low_reg;
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mask = 1 << gpio;
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v = &gpio_out_low;
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} else {
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reg = GPIO_DATA_HI_REG;
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mask = 1 << (gpio - 32);
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v = &gpio_out_high;
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}
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spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
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if (val)
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*v |= mask;
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else
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*v &= ~mask;
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bcm_gpio_writel(*v, reg);
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spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
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}
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static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
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{
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u32 reg;
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u32 mask;
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if (gpio >= chip->ngpio)
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BUG();
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if (gpio < 32) {
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reg = gpio_out_low_reg;
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mask = 1 << gpio;
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} else {
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reg = GPIO_DATA_HI_REG;
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mask = 1 << (gpio - 32);
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}
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return !!(bcm_gpio_readl(reg) & mask);
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}
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static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
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unsigned gpio, int dir)
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{
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u32 reg;
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u32 mask;
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u32 tmp;
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unsigned long flags;
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if (gpio >= chip->ngpio)
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BUG();
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if (gpio < 32) {
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reg = GPIO_CTL_LO_REG;
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mask = 1 << gpio;
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} else {
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reg = GPIO_CTL_HI_REG;
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mask = 1 << (gpio - 32);
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}
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spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
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tmp = bcm_gpio_readl(reg);
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if (dir == BCM63XX_GPIO_DIR_IN)
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tmp &= ~mask;
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else
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tmp |= mask;
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bcm_gpio_writel(tmp, reg);
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spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
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return 0;
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}
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static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
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}
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static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
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unsigned gpio, int value)
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{
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bcm63xx_gpio_set(chip, gpio, value);
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return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
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}
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static struct gpio_chip bcm63xx_gpio_chip = {
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.label = "bcm63xx-gpio",
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.direction_input = bcm63xx_gpio_direction_input,
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.direction_output = bcm63xx_gpio_direction_output,
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.get = bcm63xx_gpio_get,
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.set = bcm63xx_gpio_set,
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.base = 0,
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};
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int __init bcm63xx_gpio_init(void)
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{
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bcm63xx_gpio_out_low_reg_init();
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gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
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if (!BCMCPU_IS_6345())
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gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
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bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
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pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
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return gpiochip_add(&bcm63xx_gpio_chip);
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}
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