This change adds the first network driver for the tile architecture, supporting the on-chip XGBE and GBE shims. The infrastructure is present for the TILE-Gx networking drivers (another three source files in the new directory) but for now the the actual tilegx sources are waiting on releasing hardware to initial customers. Note that arch/tile/include/hv/* are "upstream" headers from the Tilera hypervisor and will probably benefit less from LKML review. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
		
			
				
	
	
		
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			300 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2010 Tilera Corporation. All Rights Reserved.
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 *
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 *   This program is free software; you can redistribute it and/or
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 *   modify it under the terms of the GNU General Public License
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 *   as published by the Free Software Foundation, version 2.
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 *
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 *   This program is distributed in the hope that it will be useful, but
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 *   WITHOUT ANY WARRANTY; without even the implied warranty of
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 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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 *   NON INFRINGEMENT.  See the GNU General Public License for
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 *   more details.
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 */
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/**
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 * @file drivers/xgbe/impl.h
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 * Implementation details for the NetIO library.
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 */
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#ifndef __DRV_XGBE_IMPL_H__
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#define __DRV_XGBE_IMPL_H__
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#include <hv/netio_errors.h>
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#include <hv/netio_intf.h>
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#include <hv/drv_xgbe_intf.h>
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/** How many groups we have (log2). */
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#define LOG2_NUM_GROUPS (12)
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/** How many groups we have. */
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#define NUM_GROUPS (1 << LOG2_NUM_GROUPS)
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/** Number of output requests we'll buffer per tile. */
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#define EPP_REQS_PER_TILE (32)
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/** Words used in an eDMA command without checksum acceleration. */
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#define EDMA_WDS_NO_CSUM      8
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/** Words used in an eDMA command with checksum acceleration. */
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#define EDMA_WDS_CSUM        10
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/** Total available words in the eDMA command FIFO. */
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#define EDMA_WDS_TOTAL      128
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/*
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 * FIXME: These definitions are internal and should have underscores!
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 * NOTE: The actual numeric values here are intentional and allow us to
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 * optimize the concept "if small ... else if large ... else ...", by
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 * checking for the low bit being set, and then for non-zero.
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 * These are used as array indices, so they must have the values (0, 1, 2)
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 * in some order.
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 */
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#define SIZE_SMALL (1)       /**< Small packet queue. */
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#define SIZE_LARGE (2)       /**< Large packet queue. */
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#define SIZE_JUMBO (0)       /**< Jumbo packet queue. */
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/** The number of "SIZE_xxx" values. */
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#define NETIO_NUM_SIZES 3
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/*
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 * Default numbers of packets for IPP drivers.  These values are chosen
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 * such that CIPP1 will not overflow its L2 cache.
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 */
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/** The default number of small packets. */
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#define NETIO_DEFAULT_SMALL_PACKETS 2750
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/** The default number of large packets. */
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#define NETIO_DEFAULT_LARGE_PACKETS 2500
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/** The default number of jumbo packets. */
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#define NETIO_DEFAULT_JUMBO_PACKETS 250
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/** Log2 of the size of a memory arena. */
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#define NETIO_ARENA_SHIFT      24      /* 16 MB */
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/** Size of a memory arena. */
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#define NETIO_ARENA_SIZE       (1 << NETIO_ARENA_SHIFT)
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/** A queue of packets.
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 *
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 * This structure partially defines a queue of packets waiting to be
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 * processed.  The queue as a whole is written to by an interrupt handler and
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 * read by non-interrupt code; this data structure is what's touched by the
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 * interrupt handler.  The other part of the queue state, the read offset, is
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 * kept in user space, not in hypervisor space, so it is in a separate data
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 * structure.
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 *
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 * The read offset (__packet_receive_read in the user part of the queue
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 * structure) points to the next packet to be read. When the read offset is
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 * equal to the write offset, the queue is empty; therefore the queue must
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 * contain one more slot than the required maximum queue size.
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 *
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 * Here's an example of all 3 state variables and what they mean.  All
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 * pointers move left to right.
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 *
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 * @code
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 *   I   I   V   V   V   V   I   I   I   I
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 *   0   1   2   3   4   5   6   7   8   9  10
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 *           ^       ^       ^               ^
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 *           |               |               |
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 *           |               |               __last_packet_plus_one
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 *           |               __buffer_write
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 *           __packet_receive_read
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 * @endcode
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 *
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 * This queue has 10 slots, and thus can hold 9 packets (_last_packet_plus_one
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 * = 10).  The read pointer is at 2, and the write pointer is at 6; thus,
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 * there are valid, unread packets in slots 2, 3, 4, and 5.  The remaining
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 * slots are invalid (do not contain a packet).
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 */
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typedef struct {
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  /** Byte offset of the next notify packet to be written: zero for the first
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   *  packet on the queue, sizeof (netio_pkt_t) for the second packet on the
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   *  queue, etc. */
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  volatile uint32_t __packet_write;
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  /** Offset of the packet after the last valid packet (i.e., when any
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   *  pointer is incremented to this value, it wraps back to zero). */
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  uint32_t __last_packet_plus_one;
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}
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__netio_packet_queue_t;
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/** A queue of buffers.
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 *
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 * This structure partially defines a queue of empty buffers which have been
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 * obtained via requests to the IPP.  (The elements of the queue are packet
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 * handles, which are transformed into a full netio_pkt_t when the buffer is
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 * retrieved.)  The queue as a whole is written to by an interrupt handler and
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 * read by non-interrupt code; this data structure is what's touched by the
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 * interrupt handler.  The other parts of the queue state, the read offset and
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 * requested write offset, are kept in user space, not in hypervisor space, so
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 * they are in a separate data structure.
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 *
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 * The read offset (__buffer_read in the user part of the queue structure)
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 * points to the next buffer to be read. When the read offset is equal to the
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 * write offset, the queue is empty; therefore the queue must contain one more
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 * slot than the required maximum queue size.
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 *
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 * The requested write offset (__buffer_requested_write in the user part of
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 * the queue structure) points to the slot which will hold the next buffer we
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 * request from the IPP, once we get around to sending such a request.  When
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 * the requested write offset is equal to the write offset, no requests for
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 * new buffers are outstanding; when the requested write offset is one greater
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 * than the read offset, no more requests may be sent.
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 *
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 * Note that, unlike the packet_queue, the buffer_queue places incoming
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 * buffers at decreasing addresses.  This makes the check for "is it time to
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 * wrap the buffer pointer" cheaper in the assembly code which receives new
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 * buffers, and means that the value which defines the queue size,
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 * __last_buffer, is different than in the packet queue.  Also, the offset
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 * used in the packet_queue is already scaled by the size of a packet; here we
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 * use unscaled slot indices for the offsets.  (These differences are
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 * historical, and in the future it's possible that the packet_queue will look
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 * more like this queue.)
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 *
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 * @code
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 * Here's an example of all 4 state variables and what they mean.  Remember:
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 * all pointers move right to left.
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 *
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 *   V   V   V   I   I   R   R   V   V   V
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 *   0   1   2   3   4   5   6   7   8   9
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 *           ^       ^       ^           ^
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 *           |       |       |           |
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 *           |       |       |           __last_buffer
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 *           |       |       __buffer_write
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 *           |       __buffer_requested_write
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 *           __buffer_read
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 * @endcode
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 *
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 * This queue has 10 slots, and thus can hold 9 buffers (_last_buffer = 9).
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 * The read pointer is at 2, and the write pointer is at 6; thus, there are
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 * valid, unread buffers in slots 2, 1, 0, 9, 8, and 7.  The requested write
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 * pointer is at 4; thus, requests have been made to the IPP for buffers which
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 * will be placed in slots 6 and 5 when they arrive.  Finally, the remaining
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 * slots are invalid (do not contain a buffer).
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 */
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typedef struct
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{
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  /** Ordinal number of the next buffer to be written: 0 for the first slot in
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   *  the queue, 1 for the second slot in the queue, etc. */
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  volatile uint32_t __buffer_write;
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  /** Ordinal number of the last buffer (i.e., when any pointer is decremented
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   *  below zero, it is reloaded with this value). */
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  uint32_t __last_buffer;
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}
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__netio_buffer_queue_t;
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/**
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 * An object for providing Ethernet packets to a process.
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 */
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typedef struct __netio_queue_impl_t
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{
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  /** The queue of packets waiting to be received. */
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  __netio_packet_queue_t __packet_receive_queue;
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  /** The intr bit mask that IDs this device. */
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  unsigned int __intr_id;
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  /** Offset to queues of empty buffers, one per size. */
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  uint32_t __buffer_queue[NETIO_NUM_SIZES];
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  /** The address of the first EPP tile, or -1 if no EPP. */
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  /* ISSUE: Actually this is always "0" or "~0". */
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  uint32_t __epp_location;
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  /** The queue ID that this queue represents. */
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  unsigned int __queue_id;
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  /** Number of acknowledgements received. */
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  volatile uint32_t __acks_received;
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  /** Last completion number received for packet_sendv. */
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  volatile uint32_t __last_completion_rcv;
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  /** Number of packets allowed to be outstanding. */
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  uint32_t __max_outstanding;
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  /** First VA available for packets. */
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  void* __va_0;
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  /** First VA in second range available for packets. */
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  void* __va_1;
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  /** Padding to align the "__packets" field to the size of a netio_pkt_t. */
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  uint32_t __padding[3];
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  /** The packets themselves. */
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  netio_pkt_t __packets[0];
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}
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netio_queue_impl_t;
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/**
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 * An object for managing the user end of a NetIO queue.
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 */
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typedef struct __netio_queue_user_impl_t
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{
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  /** The next incoming packet to be read. */
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  uint32_t __packet_receive_read;
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  /** The next empty buffers to be read, one index per size. */
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  uint8_t __buffer_read[NETIO_NUM_SIZES];
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  /** Where the empty buffer we next request from the IPP will go, one index
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   * per size. */
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  uint8_t __buffer_requested_write[NETIO_NUM_SIZES];
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  /** PCIe interface flag. */
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  uint8_t __pcie;
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  /** Number of packets left to be received before we send a credit update. */
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  uint32_t __receive_credit_remaining;
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  /** Value placed in __receive_credit_remaining when it reaches zero. */
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  uint32_t __receive_credit_interval;
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  /** First fast I/O routine index. */
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  uint32_t __fastio_index;
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  /** Number of acknowledgements expected. */
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  uint32_t __acks_outstanding;
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  /** Last completion number requested. */
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  uint32_t __last_completion_req;
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  /** File descriptor for driver. */
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  int __fd;
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}
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netio_queue_user_impl_t;
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#define NETIO_GROUP_CHUNK_SIZE   64   /**< Max # groups in one IPP request */
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#define NETIO_BUCKET_CHUNK_SIZE  64   /**< Max # buckets in one IPP request */
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/** Internal structure used to convey packet send information to the
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 * hypervisor.  FIXME: Actually, it's not used for that anymore, but
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 * netio_packet_send() still uses it internally.
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 */
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typedef struct
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{
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  uint16_t flags;              /**< Packet flags (__NETIO_SEND_FLG_xxx) */
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  uint16_t transfer_size;      /**< Size of packet */
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  uint32_t va;                 /**< VA of start of packet */
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  __netio_pkt_handle_t handle; /**< Packet handle */
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  uint32_t csum0;              /**< First checksum word */
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  uint32_t csum1;              /**< Second checksum word */
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}
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__netio_send_cmd_t;
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/** Flags used in two contexts:
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 *  - As the "flags" member in the __netio_send_cmd_t, above; used only
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 *    for netio_pkt_send_{prepare,commit}.
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 *  - As part of the flags passed to the various send packet fast I/O calls.
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 */
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/** Need acknowledgement on this packet.  Note that some code in the
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 *  normal send_pkt fast I/O handler assumes that this is equal to 1. */
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#define __NETIO_SEND_FLG_ACK    0x1
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/** Do checksum on this packet.  (Only used with the __netio_send_cmd_t;
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 *  normal packet sends use a special fast I/O index to denote checksumming,
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 *  and multi-segment sends test the checksum descriptor.) */
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#define __NETIO_SEND_FLG_CSUM   0x2
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/** Get a completion on this packet.  Only used with multi-segment sends.  */
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#define __NETIO_SEND_FLG_COMPLETION 0x4
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/** Position of the number-of-extra-segments value in the flags word.
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    Only used with multi-segment sends. */
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#define __NETIO_SEND_FLG_XSEG_SHIFT 3
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/** Width of the number-of-extra-segments value in the flags word. */
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#define __NETIO_SEND_FLG_XSEG_WIDTH 2
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#endif /* __DRV_XGBE_IMPL_H__ */
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