f38c02f3b3
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
143 lines
3.2 KiB
C
143 lines
3.2 KiB
C
/*
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* linux/arch/arm/mach-clps711x/irq.c
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/hardware/clps7111.h>
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static void int1_mask(struct irq_data *d)
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{
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u32 intmr1;
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intmr1 = clps_readl(INTMR1);
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intmr1 &= ~(1 << d->irq);
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clps_writel(intmr1, INTMR1);
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}
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static void int1_ack(struct irq_data *d)
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{
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u32 intmr1;
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intmr1 = clps_readl(INTMR1);
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intmr1 &= ~(1 << d->irq);
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clps_writel(intmr1, INTMR1);
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switch (d->irq) {
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case IRQ_CSINT: clps_writel(0, COEOI); break;
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case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
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case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
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case IRQ_RTCMI: clps_writel(0, RTCEOI); break;
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case IRQ_TINT: clps_writel(0, TEOI); break;
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case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
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}
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}
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static void int1_unmask(struct irq_data *d)
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{
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u32 intmr1;
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intmr1 = clps_readl(INTMR1);
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intmr1 |= 1 << d->irq;
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clps_writel(intmr1, INTMR1);
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}
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static struct irq_chip int1_chip = {
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.irq_ack = int1_ack,
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.irq_mask = int1_mask,
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.irq_unmask = int1_unmask,
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};
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static void int2_mask(struct irq_data *d)
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{
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u32 intmr2;
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intmr2 = clps_readl(INTMR2);
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intmr2 &= ~(1 << (d->irq - 16));
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clps_writel(intmr2, INTMR2);
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}
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static void int2_ack(struct irq_data *d)
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{
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u32 intmr2;
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intmr2 = clps_readl(INTMR2);
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intmr2 &= ~(1 << (d->irq - 16));
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clps_writel(intmr2, INTMR2);
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switch (d->irq) {
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case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
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}
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}
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static void int2_unmask(struct irq_data *d)
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{
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u32 intmr2;
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intmr2 = clps_readl(INTMR2);
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intmr2 |= 1 << (d->irq - 16);
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clps_writel(intmr2, INTMR2);
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}
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static struct irq_chip int2_chip = {
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.irq_ack = int2_ack,
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.irq_mask = int2_mask,
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.irq_unmask = int2_unmask,
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};
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void __init clps711x_init_irq(void)
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{
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unsigned int i;
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for (i = 0; i < NR_IRQS; i++) {
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if (INT1_IRQS & (1 << i)) {
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irq_set_chip_and_handler(i, &int1_chip,
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handle_level_irq);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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if (INT2_IRQS & (1 << i)) {
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irq_set_chip_and_handler(i, &int2_chip,
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handle_level_irq);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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}
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/*
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* Disable interrupts
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*/
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clps_writel(0, INTMR1);
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clps_writel(0, INTMR2);
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/*
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* Clear down any pending interrupts
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*/
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clps_writel(0, COEOI);
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clps_writel(0, TC1EOI);
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clps_writel(0, TC2EOI);
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clps_writel(0, RTCEOI);
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clps_writel(0, TEOI);
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clps_writel(0, UMSEOI);
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clps_writel(0, SYNCIO);
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clps_writel(0, KBDEOI);
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}
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