 82baa0eb46
			
		
	
	
	82baa0eb46
	
	
	
		
			
			Into perf-sys.h header, as requested by Peter: http://lkml.kernel.org/r/20140502115201.GI30445@twins.programming.kicks-ass.net Adding HAVE_ATTR_TEST define to turn off/on the attribute test code in the sys_perf_event_open function. Requested-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Borislav Petkov <bp@suse.de> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> Cc: David Ahern <dsahern@gmail.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1399293219-8732-10-git-send-email-jolsa@kernel.org Signed-off-by: Jiri Olsa <jolsa@kernel.org>
		
			
				
	
	
		
			190 lines
		
	
	
	
		
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			C
		
	
	
	
	
	
			
		
		
	
	
			190 lines
		
	
	
	
		
			5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _PERF_SYS_H
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| #define _PERF_SYS_H
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| 
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| #include <unistd.h>
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| #include <sys/types.h>
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| #include <sys/syscall.h>
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| #include <linux/types.h>
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| #include <linux/perf_event.h>
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| #include <asm/unistd.h>
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| 
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| #if defined(__i386__)
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| #define mb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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| #define wmb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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| #define rmb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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| #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
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| #define CPUINFO_PROC	"model name"
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| #ifndef __NR_perf_event_open
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| # define __NR_perf_event_open 336
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| #endif
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| #ifndef __NR_futex
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| # define __NR_futex 240
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| #endif
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| #ifndef __NR_gettid
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| # define __NR_gettid 224
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| #endif
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| #endif
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| 
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| #if defined(__x86_64__)
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| #define mb()		asm volatile("mfence" ::: "memory")
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| #define wmb()		asm volatile("sfence" ::: "memory")
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| #define rmb()		asm volatile("lfence" ::: "memory")
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| #define cpu_relax()	asm volatile("rep; nop" ::: "memory");
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| #define CPUINFO_PROC	"model name"
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| #ifndef __NR_perf_event_open
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| # define __NR_perf_event_open 298
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| #endif
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| #ifndef __NR_futex
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| # define __NR_futex 202
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| #endif
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| #ifndef __NR_gettid
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| # define __NR_gettid 186
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| #endif
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| #endif
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| 
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| #ifdef __powerpc__
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| #include "../../arch/powerpc/include/uapi/asm/unistd.h"
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| #define mb()		asm volatile ("sync" ::: "memory")
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| #define wmb()		asm volatile ("sync" ::: "memory")
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| #define rmb()		asm volatile ("sync" ::: "memory")
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| #define CPUINFO_PROC	"cpu"
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| #endif
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| 
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| #ifdef __s390__
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| #define mb()		asm volatile("bcr 15,0" ::: "memory")
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| #define wmb()		asm volatile("bcr 15,0" ::: "memory")
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| #define rmb()		asm volatile("bcr 15,0" ::: "memory")
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| #endif
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| 
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| #ifdef __sh__
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| #if defined(__SH4A__) || defined(__SH5__)
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| # define mb()		asm volatile("synco" ::: "memory")
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| # define wmb()		asm volatile("synco" ::: "memory")
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| # define rmb()		asm volatile("synco" ::: "memory")
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| #else
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| # define mb()		asm volatile("" ::: "memory")
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| # define wmb()		asm volatile("" ::: "memory")
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| # define rmb()		asm volatile("" ::: "memory")
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| #endif
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| #define CPUINFO_PROC	"cpu type"
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| #endif
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| 
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| #ifdef __hppa__
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| #define mb()		asm volatile("" ::: "memory")
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| #define wmb()		asm volatile("" ::: "memory")
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| #define rmb()		asm volatile("" ::: "memory")
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| #define CPUINFO_PROC	"cpu"
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| #endif
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| 
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| #ifdef __sparc__
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| #ifdef __LP64__
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| #define mb()		asm volatile("ba,pt %%xcc, 1f\n"	\
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| 				     "membar #StoreLoad\n"	\
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| 				     "1:\n":::"memory")
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| #else
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| #define mb()		asm volatile("":::"memory")
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| #endif
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| #define wmb()		asm volatile("":::"memory")
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| #define rmb()		asm volatile("":::"memory")
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| #define CPUINFO_PROC	"cpu"
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| #endif
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| 
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| #ifdef __alpha__
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| #define mb()		asm volatile("mb" ::: "memory")
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| #define wmb()		asm volatile("wmb" ::: "memory")
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| #define rmb()		asm volatile("mb" ::: "memory")
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| #define CPUINFO_PROC	"cpu model"
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| #endif
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| 
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| #ifdef __ia64__
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| #define mb()		asm volatile ("mf" ::: "memory")
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| #define wmb()		asm volatile ("mf" ::: "memory")
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| #define rmb()		asm volatile ("mf" ::: "memory")
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| #define cpu_relax()	asm volatile ("hint @pause" ::: "memory")
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| #define CPUINFO_PROC	"model name"
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| #endif
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| 
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| #ifdef __arm__
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| /*
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|  * Use the __kuser_memory_barrier helper in the CPU helper page. See
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|  * arch/arm/kernel/entry-armv.S in the kernel source for details.
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|  */
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| #define mb()		((void(*)(void))0xffff0fa0)()
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| #define wmb()		((void(*)(void))0xffff0fa0)()
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| #define rmb()		((void(*)(void))0xffff0fa0)()
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| #define CPUINFO_PROC	"Processor"
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| #endif
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| 
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| #ifdef __aarch64__
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| #define mb()		asm volatile("dmb ish" ::: "memory")
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| #define wmb()		asm volatile("dmb ishst" ::: "memory")
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| #define rmb()		asm volatile("dmb ishld" ::: "memory")
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| #define cpu_relax()	asm volatile("yield" ::: "memory")
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| #endif
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| 
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| #ifdef __mips__
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| #define mb()		asm volatile(					\
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| 				".set	mips2\n\t"			\
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| 				"sync\n\t"				\
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| 				".set	mips0"				\
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| 				: /* no output */			\
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| 				: /* no input */			\
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| 				: "memory")
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| #define wmb()	mb()
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| #define rmb()	mb()
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| #define CPUINFO_PROC	"cpu model"
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| #endif
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| 
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| #ifdef __arc__
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| #define mb()		asm volatile("" ::: "memory")
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| #define wmb()		asm volatile("" ::: "memory")
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| #define rmb()		asm volatile("" ::: "memory")
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| #define CPUINFO_PROC	"Processor"
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| #endif
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| 
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| #ifdef __metag__
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| #define mb()		asm volatile("" ::: "memory")
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| #define wmb()		asm volatile("" ::: "memory")
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| #define rmb()		asm volatile("" ::: "memory")
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| #define CPUINFO_PROC	"CPU"
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| #endif
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| 
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| #ifdef __xtensa__
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| #define mb()		asm volatile("memw" ::: "memory")
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| #define wmb()		asm volatile("memw" ::: "memory")
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| #define rmb()		asm volatile("" ::: "memory")
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| #define CPUINFO_PROC	"core ID"
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| #endif
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| 
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| #ifdef __tile__
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| #define mb()		asm volatile ("mf" ::: "memory")
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| #define wmb()		asm volatile ("mf" ::: "memory")
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| #define rmb()		asm volatile ("mf" ::: "memory")
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| #define cpu_relax()	asm volatile ("mfspr zero, PASS" ::: "memory")
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| #define CPUINFO_PROC    "model name"
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| #endif
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| 
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| #define barrier() asm volatile ("" ::: "memory")
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| 
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| #ifndef cpu_relax
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| #define cpu_relax() barrier()
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| #endif
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| 
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| static inline int
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| sys_perf_event_open(struct perf_event_attr *attr,
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| 		      pid_t pid, int cpu, int group_fd,
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| 		      unsigned long flags)
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| {
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| 	int fd;
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| 
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| 	fd = syscall(__NR_perf_event_open, attr, pid, cpu,
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| 		     group_fd, flags);
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| 
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| #ifdef HAVE_ATTR_TEST
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| 	if (unlikely(test_attr__enabled))
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| 		test_attr__open(attr, pid, cpu, fd, group_fd, flags);
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| #endif
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| 	return fd;
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| }
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| 
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| #endif /* _PERF_SYS_H */
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