This implements a powerpc version of perf_arch_fetch_caller_regs
to get correct call-graphs.
It's implemented in assembly because that way we can be sure there isn't
a stack frame for perf_arch_fetch_caller_regs. If it was in C, gcc might
or might not create a stack frame for it, which would affect the number
of levels we have to skip.
With this, we see results from perf record -e lock:lock_acquire like
this:
# Samples: 24878
#
# Overhead Command Shared Object Symbol
# ........ .............. ................. ......
#
14.99% perf [kernel.kallsyms] [k] ._raw_spin_lock
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--- ._raw_spin_lock
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|--25.00%-- .alloc_fd
| (nil)
| |
| |--50.00%-- .anon_inode_getfd
| | .sys_perf_event_open
| | syscall_exit
| | syscall
| | create_counter
| | __cmd_record
| | run_builtin
| | main
| | 0xfd2e704
| | 0xfd2e8c0
| | (nil)
... etc.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: anton@samba.org
Cc: linuxppc-dev@ozlabs.org
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20100318050513.GA6575@drongo>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
72 lines
2 KiB
C
72 lines
2 KiB
C
#ifndef _ASM_POWERPC_ASM_COMPAT_H
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#define _ASM_POWERPC_ASM_COMPAT_H
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#include <asm/types.h>
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#include <asm/ppc-opcode.h>
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#ifdef __ASSEMBLY__
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# define stringify_in_c(...) __VA_ARGS__
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# define ASM_CONST(x) x
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#else
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/* This version of stringify will deal with commas... */
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# define __stringify_in_c(...) #__VA_ARGS__
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# define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " "
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# define __ASM_CONST(x) x##UL
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# define ASM_CONST(x) __ASM_CONST(x)
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#endif
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#ifdef __powerpc64__
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/* operations for longs and pointers */
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#define PPC_LL stringify_in_c(ld)
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#define PPC_STL stringify_in_c(std)
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#define PPC_LCMPI stringify_in_c(cmpdi)
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#define PPC_LONG stringify_in_c(.llong)
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#define PPC_LONG_ALIGN stringify_in_c(.balign 8)
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#define PPC_TLNEI stringify_in_c(tdnei)
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#define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh)
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#define PPC_STLCX stringify_in_c(stdcx.)
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#define PPC_CNTLZL stringify_in_c(cntlzd)
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#define PPC_LR_STKOFF 16
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/* Move to CR, single-entry optimized version. Only available
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* on POWER4 and later.
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*/
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#ifdef CONFIG_POWER4_ONLY
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#define PPC_MTOCRF stringify_in_c(mtocrf)
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#else
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#define PPC_MTOCRF stringify_in_c(mtcrf)
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#endif
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#else /* 32-bit */
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/* operations for longs and pointers */
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#define PPC_LL stringify_in_c(lwz)
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#define PPC_STL stringify_in_c(stw)
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#define PPC_LCMPI stringify_in_c(cmpwi)
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#define PPC_LONG stringify_in_c(.long)
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#define PPC_LONG_ALIGN stringify_in_c(.balign 4)
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#define PPC_TLNEI stringify_in_c(twnei)
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#define PPC_LLARX(t, a, b, eh) PPC_LWARX(t, a, b, eh)
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#define PPC_STLCX stringify_in_c(stwcx.)
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#define PPC_CNTLZL stringify_in_c(cntlzw)
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#define PPC_MTOCRF stringify_in_c(mtcrf)
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#define PPC_LR_STKOFF 4
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#endif
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#ifdef __KERNEL__
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#ifdef CONFIG_IBM405_ERR77
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/* Erratum #77 on the 405 means we need a sync or dcbt before every
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* stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this.
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*/
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#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
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#define PPC405_ERR77_SYNC stringify_in_c(sync;)
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#else
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#define PPC405_ERR77(ra,rb)
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#define PPC405_ERR77_SYNC
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#endif
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#endif
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#endif /* _ASM_POWERPC_ASM_COMPAT_H */
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