 d2bb01b042
			
		
	
	
	d2bb01b042
	
	
	
		
			
			Signed-off-by: Kevin D. Kissell <kevink@paralogos.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			193 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			193 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
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|  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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|  * Copyright (C) 2001 MIPS Technologies, Inc.
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|  */
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| 
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| #include <asm/asm.h>
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| #include <asm/asmmacro.h>
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| #include <asm/regdef.h>
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| #include <asm/mipsregs.h>
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| #include <asm/stackframe.h>
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| #include <asm/isadep.h>
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| #include <asm/thread_info.h>
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| #include <asm/war.h>
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| #ifdef CONFIG_MIPS_MT_SMTC
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| #include <asm/mipsmtregs.h>
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| #endif
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| 
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| #ifndef CONFIG_PREEMPT
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| #define resume_kernel	restore_all
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| #else
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| #define __ret_from_irq	ret_from_exception
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| #endif
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| 
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| 	.text
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| 	.align	5
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| #ifndef CONFIG_PREEMPT
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| FEXPORT(ret_from_exception)
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| 	local_irq_disable			# preempt stop
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| 	b	__ret_from_irq
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| #endif
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| FEXPORT(ret_from_irq)
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| 	LONG_S	s0, TI_REGS($28)
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| FEXPORT(__ret_from_irq)
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| 	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
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| 	andi	t0, t0, KU_USER
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| 	beqz	t0, resume_kernel
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| 
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| resume_userspace:
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| 	local_irq_disable		# make sure we dont miss an
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| 					# interrupt setting need_resched
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| 					# between sampling and return
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| 	LONG_L	a2, TI_FLAGS($28)	# current->work
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| 	andi	t0, a2, _TIF_WORK_MASK	# (ignoring syscall_trace)
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| 	bnez	t0, work_pending
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| 	j	restore_all
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| 
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| #ifdef CONFIG_PREEMPT
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| resume_kernel:
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| 	local_irq_disable
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| 	lw	t0, TI_PRE_COUNT($28)
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| 	bnez	t0, restore_all
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| need_resched:
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| 	LONG_L	t0, TI_FLAGS($28)
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| 	andi	t1, t0, _TIF_NEED_RESCHED
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| 	beqz	t1, restore_all
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| 	LONG_L	t0, PT_STATUS(sp)		# Interrupts off?
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| 	andi	t0, 1
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| 	beqz	t0, restore_all
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| 	jal	preempt_schedule_irq
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| 	b	need_resched
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| #endif
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| 
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| FEXPORT(ret_from_fork)
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| 	jal	schedule_tail		# a0 = struct task_struct *prev
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| 
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| FEXPORT(syscall_exit)
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| 	local_irq_disable		# make sure need_resched and
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| 					# signals dont change between
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| 					# sampling and return
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| 	LONG_L	a2, TI_FLAGS($28)	# current->work
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| 	li	t0, _TIF_ALLWORK_MASK
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| 	and	t0, a2, t0
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| 	bnez	t0, syscall_exit_work
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| 
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| FEXPORT(restore_all)			# restore full frame
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| #ifdef CONFIG_MIPS_MT_SMTC
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| #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
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| /* Re-arm any temporarily masked interrupts not explicitly "acked" */
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| 	mfc0	v0, CP0_TCSTATUS
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| 	ori	v1, v0, TCSTATUS_IXMT
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| 	mtc0	v1, CP0_TCSTATUS
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| 	andi	v0, TCSTATUS_IXMT
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| 	_ehb
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| 	mfc0	t0, CP0_TCCONTEXT
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| 	DMT	9				# dmt t1
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| 	jal	mips_ihb
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| 	mfc0	t2, CP0_STATUS
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| 	andi	t3, t0, 0xff00
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| 	or	t2, t2, t3
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| 	mtc0	t2, CP0_STATUS
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| 	_ehb
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| 	andi	t1, t1, VPECONTROL_TE
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| 	beqz	t1, 1f
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| 	EMT
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| 1:
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| 	mfc0	v1, CP0_TCSTATUS
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| 	/* We set IXMT above, XOR should clear it here */
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| 	xori	v1, v1, TCSTATUS_IXMT
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| 	or	v1, v0, v1
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| 	mtc0	v1, CP0_TCSTATUS
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| 	_ehb
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| 	xor	t0, t0, t3
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| 	mtc0	t0, CP0_TCCONTEXT
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| #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
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| /* Detect and execute deferred IPI "interrupts" */
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| 	LONG_L	s0, TI_REGS($28)
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| 	LONG_S	sp, TI_REGS($28)
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| 	jal	deferred_smtc_ipi
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| 	LONG_S	s0, TI_REGS($28)
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| #endif /* CONFIG_MIPS_MT_SMTC */
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| 	.set	noat
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| 	RESTORE_TEMP
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| 	RESTORE_AT
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| 	RESTORE_STATIC
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| FEXPORT(restore_partial)		# restore partial frame
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| #ifdef CONFIG_TRACE_IRQFLAGS
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| 	SAVE_STATIC
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| 	SAVE_AT
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| 	SAVE_TEMP
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| 	LONG_L	v0, PT_STATUS(sp)
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| #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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| 	and	v0, ST0_IEP
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| #else
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| 	and	v0, ST0_IE
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| #endif
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| 	beqz	v0, 1f
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| 	jal	trace_hardirqs_on
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| 	b	2f
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| 1:	jal	trace_hardirqs_off
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| 2:
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| 	RESTORE_TEMP
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| 	RESTORE_AT
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| 	RESTORE_STATIC
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| #endif
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| 	RESTORE_SOME
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| 	RESTORE_SP_AND_RET
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| 	.set	at
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| 
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| work_pending:
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| 	andi	t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
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| 	beqz	t0, work_notifysig
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| work_resched:
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| 	jal	schedule
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| 
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| 	local_irq_disable		# make sure need_resched and
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| 					# signals dont change between
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| 					# sampling and return
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| 	LONG_L	a2, TI_FLAGS($28)
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| 	andi	t0, a2, _TIF_WORK_MASK	# is there any work to be done
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| 					# other than syscall tracing?
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| 	beqz	t0, restore_all
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| 	andi	t0, a2, _TIF_NEED_RESCHED
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| 	bnez	t0, work_resched
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| 
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| work_notifysig:				# deal with pending signals and
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| 					# notify-resume requests
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| 	move	a0, sp
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| 	li	a1, 0
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| 	jal	do_notify_resume	# a2 already loaded
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| 	j	resume_userspace
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| 
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| FEXPORT(syscall_exit_work_partial)
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| 	SAVE_STATIC
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| syscall_exit_work:
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| 	li	t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
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| 	and	t0, a2			# a2 is preloaded with TI_FLAGS
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| 	beqz	t0, work_pending	# trace bit set?
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| 	local_irq_enable		# could let do_syscall_trace()
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| 					# call schedule() instead
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| 	move	a0, sp
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| 	li	a1, 1
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| 	jal	do_syscall_trace
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| 	b	resume_userspace
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| 
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| #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
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| 
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| /*
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|  * MIPS32R2 Instruction Hazard Barrier - must be called
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|  *
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|  * For C code use the inline version named instruction_hazard().
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|  */
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| LEAF(mips_ihb)
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| 	.set	mips32r2
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| 	jr.hb	ra
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| 	nop
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| 	END(mips_ihb)
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| 
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| #endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */
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