4a3a950ee9
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
242 lines
6 KiB
C
242 lines
6 KiB
C
/*
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* Toumaz Xenif TZ1090 PDC GPIO handling.
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*
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* Copyright (C) 2012-2013 Imagination Technologies Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/syscore_ops.h>
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#include <asm/global_lock.h>
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/* Register offsets from SOC_GPIO_CONTROL0 */
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#define REG_SOC_GPIO_CONTROL0 0x00
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#define REG_SOC_GPIO_CONTROL1 0x04
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#define REG_SOC_GPIO_CONTROL2 0x08
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#define REG_SOC_GPIO_CONTROL3 0x0c
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#define REG_SOC_GPIO_STATUS 0x80
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/* PDC GPIOs go after normal GPIOs */
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#define GPIO_PDC_BASE 90
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#define GPIO_PDC_NGPIO 7
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/* Out of PDC gpios, only syswakes have irqs */
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#define GPIO_PDC_IRQ_FIRST 2
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#define GPIO_PDC_NIRQ 3
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/**
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* struct tz1090_pdc_gpio - GPIO bank private data
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* @chip: Generic GPIO chip for GPIO bank
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* @reg: Base of registers, offset for this GPIO bank
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* @irq: IRQ numbers for Syswake GPIOs
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*
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* This is the main private data for the PDC GPIO driver. It encapsulates a
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* gpio_chip, and the callbacks for the gpio_chip can access the private data
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* with the to_pdc() macro below.
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*/
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struct tz1090_pdc_gpio {
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struct gpio_chip chip;
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void __iomem *reg;
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int irq[GPIO_PDC_NIRQ];
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};
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#define to_pdc(c) container_of(c, struct tz1090_pdc_gpio, chip)
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/* Register accesses into the PDC MMIO area */
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static inline void pdc_write(struct tz1090_pdc_gpio *priv, unsigned int reg_offs,
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unsigned int data)
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{
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writel(data, priv->reg + reg_offs);
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}
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static inline unsigned int pdc_read(struct tz1090_pdc_gpio *priv,
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unsigned int reg_offs)
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{
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return readl(priv->reg + reg_offs);
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}
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/* Generic GPIO interface */
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static int tz1090_pdc_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct tz1090_pdc_gpio *priv = to_pdc(chip);
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u32 value;
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int lstat;
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__global_lock2(lstat);
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value = pdc_read(priv, REG_SOC_GPIO_CONTROL1);
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value |= BIT(offset);
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pdc_write(priv, REG_SOC_GPIO_CONTROL1, value);
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__global_unlock2(lstat);
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return 0;
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}
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static int tz1090_pdc_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset,
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int output_value)
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{
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struct tz1090_pdc_gpio *priv = to_pdc(chip);
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u32 value;
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int lstat;
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__global_lock2(lstat);
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/* EXT_POWER doesn't seem to have an output value bit */
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if (offset < 6) {
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value = pdc_read(priv, REG_SOC_GPIO_CONTROL0);
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if (output_value)
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value |= BIT(offset);
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else
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value &= ~BIT(offset);
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pdc_write(priv, REG_SOC_GPIO_CONTROL0, value);
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}
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value = pdc_read(priv, REG_SOC_GPIO_CONTROL1);
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value &= ~BIT(offset);
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pdc_write(priv, REG_SOC_GPIO_CONTROL1, value);
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__global_unlock2(lstat);
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return 0;
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}
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static int tz1090_pdc_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct tz1090_pdc_gpio *priv = to_pdc(chip);
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return pdc_read(priv, REG_SOC_GPIO_STATUS) & BIT(offset);
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}
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static void tz1090_pdc_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int output_value)
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{
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struct tz1090_pdc_gpio *priv = to_pdc(chip);
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u32 value;
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int lstat;
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/* EXT_POWER doesn't seem to have an output value bit */
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if (offset >= 6)
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return;
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__global_lock2(lstat);
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value = pdc_read(priv, REG_SOC_GPIO_CONTROL0);
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if (output_value)
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value |= BIT(offset);
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else
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value &= ~BIT(offset);
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pdc_write(priv, REG_SOC_GPIO_CONTROL0, value);
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__global_unlock2(lstat);
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}
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static int tz1090_pdc_gpio_request(struct gpio_chip *chip, unsigned int offset)
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{
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return pinctrl_request_gpio(chip->base + offset);
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}
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static void tz1090_pdc_gpio_free(struct gpio_chip *chip, unsigned int offset)
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{
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pinctrl_free_gpio(chip->base + offset);
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}
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static int tz1090_pdc_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
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{
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struct tz1090_pdc_gpio *priv = to_pdc(chip);
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unsigned int syswake = offset - GPIO_PDC_IRQ_FIRST;
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int irq;
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/* only syswakes have irqs */
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if (syswake >= GPIO_PDC_NIRQ)
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return -EINVAL;
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irq = priv->irq[syswake];
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if (!irq)
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return -EINVAL;
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return irq;
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}
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static int tz1090_pdc_gpio_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct resource *res_regs;
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struct tz1090_pdc_gpio *priv;
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unsigned int i;
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if (!np) {
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dev_err(&pdev->dev, "must be instantiated via devicetree\n");
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return -ENOENT;
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}
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res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res_regs) {
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dev_err(&pdev->dev, "cannot find registers resource\n");
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return -ENOENT;
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}
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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dev_err(&pdev->dev, "unable to allocate driver data\n");
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return -ENOMEM;
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}
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/* Ioremap the registers */
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priv->reg = devm_ioremap(&pdev->dev, res_regs->start,
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res_regs->end - res_regs->start);
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if (!priv->reg) {
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dev_err(&pdev->dev, "unable to ioremap registers\n");
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return -ENOMEM;
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}
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/* Set up GPIO chip */
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priv->chip.label = "tz1090-pdc-gpio";
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priv->chip.dev = &pdev->dev;
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priv->chip.direction_input = tz1090_pdc_gpio_direction_input;
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priv->chip.direction_output = tz1090_pdc_gpio_direction_output;
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priv->chip.get = tz1090_pdc_gpio_get;
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priv->chip.set = tz1090_pdc_gpio_set;
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priv->chip.free = tz1090_pdc_gpio_free;
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priv->chip.request = tz1090_pdc_gpio_request;
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priv->chip.to_irq = tz1090_pdc_gpio_to_irq;
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priv->chip.of_node = np;
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/* GPIO numbering */
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priv->chip.base = GPIO_PDC_BASE;
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priv->chip.ngpio = GPIO_PDC_NGPIO;
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/* Map the syswake irqs */
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for (i = 0; i < GPIO_PDC_NIRQ; ++i)
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priv->irq[i] = irq_of_parse_and_map(np, i);
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/* Add the GPIO bank */
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gpiochip_add(&priv->chip);
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return 0;
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}
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static struct of_device_id tz1090_pdc_gpio_of_match[] = {
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{ .compatible = "img,tz1090-pdc-gpio" },
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{ },
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};
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static struct platform_driver tz1090_pdc_gpio_driver = {
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.driver = {
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.name = "tz1090-pdc-gpio",
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.of_match_table = tz1090_pdc_gpio_of_match,
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},
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.probe = tz1090_pdc_gpio_probe,
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};
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static int __init tz1090_pdc_gpio_init(void)
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{
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return platform_driver_register(&tz1090_pdc_gpio_driver);
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}
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subsys_initcall(tz1090_pdc_gpio_init);
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