Signed-off-by: abdoulaye berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
		
			
				
	
	
		
			478 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			478 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
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 *
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 * Copyright (C) 2007 David Brownell
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c/pcf857x.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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static const struct i2c_device_id pcf857x_id[] = {
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	{ "pcf8574", 8 },
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	{ "pcf8574a", 8 },
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	{ "pca8574", 8 },
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	{ "pca9670", 8 },
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	{ "pca9672", 8 },
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	{ "pca9674", 8 },
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	{ "pcf8575", 16 },
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	{ "pca8575", 16 },
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	{ "pca9671", 16 },
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	{ "pca9673", 16 },
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	{ "pca9675", 16 },
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	{ "max7328", 8 },
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	{ "max7329", 8 },
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	{ "tca9554", 8 },
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	{ }
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};
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MODULE_DEVICE_TABLE(i2c, pcf857x_id);
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#ifdef CONFIG_OF
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static const struct of_device_id pcf857x_of_table[] = {
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	{ .compatible = "nxp,pcf8574" },
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	{ .compatible = "nxp,pcf8574a" },
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	{ .compatible = "nxp,pca8574" },
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	{ .compatible = "nxp,pca9670" },
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	{ .compatible = "nxp,pca9672" },
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	{ .compatible = "nxp,pca9674" },
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	{ .compatible = "nxp,pcf8575" },
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	{ .compatible = "nxp,pca8575" },
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	{ .compatible = "nxp,pca9671" },
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	{ .compatible = "nxp,pca9673" },
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	{ .compatible = "nxp,pca9675" },
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	{ .compatible = "maxim,max7328" },
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	{ .compatible = "maxim,max7329" },
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	{ .compatible = "ti,tca9554" },
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	{ }
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};
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MODULE_DEVICE_TABLE(of, pcf857x_of_table);
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#endif
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/*
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 * The pcf857x, pca857x, and pca967x chips only expose one read and one
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 * write register.  Writing a "one" bit (to match the reset state) lets
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 * that pin be used as an input; it's not an open-drain model, but acts
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 * a bit like one.  This is described as "quasi-bidirectional"; read the
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 * chip documentation for details.
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 *
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 * Many other I2C GPIO expander chips (like the pca953x models) have
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 * more complex register models and more conventional circuitry using
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 * push/pull drivers.  They often use the same 0x20..0x27 addresses as
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 * pcf857x parts, making the "legacy" I2C driver model problematic.
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 */
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struct pcf857x {
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	struct gpio_chip	chip;
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	struct i2c_client	*client;
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	struct mutex		lock;		/* protect 'out' */
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	struct irq_domain	*irq_domain;	/* for irq demux  */
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	spinlock_t		slock;		/* protect irq demux */
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	unsigned		out;		/* software latch */
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	unsigned		status;		/* current status */
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	unsigned		irq_mapped;	/* mapped gpio irqs */
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	int (*write)(struct i2c_client *client, unsigned data);
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	int (*read)(struct i2c_client *client);
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};
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/*-------------------------------------------------------------------------*/
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/* Talk to 8-bit I/O expander */
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static int i2c_write_le8(struct i2c_client *client, unsigned data)
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{
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	return i2c_smbus_write_byte(client, data);
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}
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static int i2c_read_le8(struct i2c_client *client)
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{
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	return (int)i2c_smbus_read_byte(client);
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}
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/* Talk to 16-bit I/O expander */
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static int i2c_write_le16(struct i2c_client *client, unsigned word)
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{
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	u8 buf[2] = { word & 0xff, word >> 8, };
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	int status;
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	status = i2c_master_send(client, buf, 2);
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	return (status < 0) ? status : 0;
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}
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static int i2c_read_le16(struct i2c_client *client)
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{
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	u8 buf[2];
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	int status;
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	status = i2c_master_recv(client, buf, 2);
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	if (status < 0)
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		return status;
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	return (buf[1] << 8) | buf[0];
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}
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/*-------------------------------------------------------------------------*/
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static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
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{
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	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
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	int		status;
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	mutex_lock(&gpio->lock);
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	gpio->out |= (1 << offset);
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	status = gpio->write(gpio->client, gpio->out);
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	mutex_unlock(&gpio->lock);
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	return status;
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}
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static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
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{
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	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
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	int		value;
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	value = gpio->read(gpio->client);
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	return (value < 0) ? 0 : (value & (1 << offset));
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}
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static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
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	unsigned	bit = 1 << offset;
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	int		status;
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	mutex_lock(&gpio->lock);
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	if (value)
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		gpio->out |= bit;
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	else
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		gpio->out &= ~bit;
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	status = gpio->write(gpio->client, gpio->out);
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	mutex_unlock(&gpio->lock);
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	return status;
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}
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static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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	pcf857x_output(chip, offset, value);
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}
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/*-------------------------------------------------------------------------*/
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static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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	struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
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	int ret;
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	ret = irq_create_mapping(gpio->irq_domain, offset);
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	if (ret > 0)
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		gpio->irq_mapped |= (1 << offset);
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	return ret;
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}
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static irqreturn_t pcf857x_irq(int irq, void *data)
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{
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	struct pcf857x  *gpio = data;
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	unsigned long change, i, status, flags;
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	status = gpio->read(gpio->client);
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	spin_lock_irqsave(&gpio->slock, flags);
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	/*
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	 * call the interrupt handler iff gpio is used as
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	 * interrupt source, just to avoid bad irqs
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	 */
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	change = ((gpio->status ^ status) & gpio->irq_mapped);
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	for_each_set_bit(i, &change, gpio->chip.ngpio)
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		generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
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	gpio->status = status;
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	spin_unlock_irqrestore(&gpio->slock, flags);
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	return IRQ_HANDLED;
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}
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static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int irq,
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				 irq_hw_number_t hw)
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{
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	struct pcf857x *gpio = domain->host_data;
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	irq_set_chip_and_handler(irq,
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				 &dummy_irq_chip,
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				 handle_level_irq);
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#ifdef CONFIG_ARM
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	set_irq_flags(irq, IRQF_VALID);
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#else
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	irq_set_noprobe(irq);
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#endif
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	gpio->irq_mapped |= (1 << hw);
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	return 0;
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}
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static struct irq_domain_ops pcf857x_irq_domain_ops = {
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	.map	= pcf857x_irq_domain_map,
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};
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static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
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{
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	if (gpio->irq_domain)
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		irq_domain_remove(gpio->irq_domain);
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}
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static int pcf857x_irq_domain_init(struct pcf857x *gpio,
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				   struct i2c_client *client)
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{
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	int status;
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	gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
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						 gpio->chip.ngpio,
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						 &pcf857x_irq_domain_ops,
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						 gpio);
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	if (!gpio->irq_domain)
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		goto fail;
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	/* enable real irq */
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	status = devm_request_threaded_irq(&client->dev, client->irq,
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				NULL, pcf857x_irq, IRQF_ONESHOT |
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				IRQF_TRIGGER_FALLING | IRQF_SHARED,
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				dev_name(&client->dev), gpio);
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	if (status)
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		goto fail;
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	/* enable gpio_to_irq() */
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	gpio->chip.to_irq	= pcf857x_to_irq;
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	return 0;
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fail:
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	pcf857x_irq_domain_cleanup(gpio);
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	return -EINVAL;
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}
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/*-------------------------------------------------------------------------*/
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static int pcf857x_probe(struct i2c_client *client,
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			 const struct i2c_device_id *id)
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{
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	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
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	struct device_node		*np = client->dev.of_node;
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	struct pcf857x			*gpio;
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	unsigned int			n_latch = 0;
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	int				status;
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	if (IS_ENABLED(CONFIG_OF) && np)
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		of_property_read_u32(np, "lines-initial-states", &n_latch);
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	else if (pdata)
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		n_latch = pdata->n_latch;
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	else
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		dev_dbg(&client->dev, "no platform data\n");
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	/* Allocate, initialize, and register this gpio_chip. */
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	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
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	if (!gpio)
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		return -ENOMEM;
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	mutex_init(&gpio->lock);
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	spin_lock_init(&gpio->slock);
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	gpio->chip.base			= pdata ? pdata->gpio_base : -1;
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	gpio->chip.can_sleep		= true;
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	gpio->chip.dev			= &client->dev;
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	gpio->chip.owner		= THIS_MODULE;
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	gpio->chip.get			= pcf857x_get;
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	gpio->chip.set			= pcf857x_set;
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	gpio->chip.direction_input	= pcf857x_input;
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	gpio->chip.direction_output	= pcf857x_output;
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	gpio->chip.ngpio		= id->driver_data;
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	/* enable gpio_to_irq() if platform has settings */
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	if (client->irq) {
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		status = pcf857x_irq_domain_init(gpio, client);
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		if (status < 0) {
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			dev_err(&client->dev, "irq_domain init failed\n");
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			goto fail_irq_domain;
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		}
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	}
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	/* NOTE:  the OnSemi jlc1562b is also largely compatible with
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	 * these parts, notably for output.  It has a low-resolution
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	 * DAC instead of pin change IRQs; and its inputs can be the
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	 * result of comparators.
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	 */
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	/* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
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	 * 9670, 9672, 9764, and 9764a use quite a variety.
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	 *
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	 * NOTE: we don't distinguish here between *4 and *4a parts.
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	 */
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	if (gpio->chip.ngpio == 8) {
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		gpio->write	= i2c_write_le8;
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		gpio->read	= i2c_read_le8;
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		if (!i2c_check_functionality(client->adapter,
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				I2C_FUNC_SMBUS_BYTE))
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			status = -EIO;
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		/* fail if there's no chip present */
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		else
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			status = i2c_smbus_read_byte(client);
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	/* '75/'75c addresses are 0x20..0x27, just like the '74;
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	 * the '75c doesn't have a current source pulling high.
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	 * 9671, 9673, and 9765 use quite a variety of addresses.
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	 *
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	 * NOTE: we don't distinguish here between '75 and '75c parts.
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	 */
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	} else if (gpio->chip.ngpio == 16) {
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		gpio->write	= i2c_write_le16;
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		gpio->read	= i2c_read_le16;
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		if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
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			status = -EIO;
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		/* fail if there's no chip present */
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		else
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			status = i2c_read_le16(client);
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	} else {
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		dev_dbg(&client->dev, "unsupported number of gpios\n");
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		status = -EINVAL;
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	}
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	if (status < 0)
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		goto fail;
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	gpio->chip.label = client->name;
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	gpio->client = client;
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	i2c_set_clientdata(client, gpio);
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	/* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
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	 * We can't actually know whether a pin is configured (a) as output
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	 * and driving the signal low, or (b) as input and reporting a low
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	 * value ... without knowing the last value written since the chip
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	 * came out of reset (if any).  We can't read the latched output.
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	 *
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	 * In short, the only reliable solution for setting up pin direction
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	 * is to do it explicitly.  The setup() method can do that, but it
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	 * may cause transient glitching since it can't know the last value
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	 * written (some pins may need to be driven low).
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	 *
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	 * Using n_latch avoids that trouble.  When left initialized to zero,
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	 * our software copy of the "latch" then matches the chip's all-ones
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	 * reset state.  Otherwise it flags pins to be driven low.
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	 */
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	gpio->out = ~n_latch;
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	gpio->status = gpio->out;
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	status = gpiochip_add(&gpio->chip);
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	if (status < 0)
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		goto fail;
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	/* Let platform code set up the GPIOs and their users.
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	 * Now is the first time anyone could use them.
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	 */
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	if (pdata && pdata->setup) {
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		status = pdata->setup(client,
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				gpio->chip.base, gpio->chip.ngpio,
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				pdata->context);
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		if (status < 0)
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			dev_warn(&client->dev, "setup --> %d\n", status);
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	}
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	dev_info(&client->dev, "probed\n");
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	return 0;
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fail:
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	if (client->irq)
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		pcf857x_irq_domain_cleanup(gpio);
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fail_irq_domain:
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	dev_dbg(&client->dev, "probe error %d for '%s'\n",
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		status, client->name);
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	return status;
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}
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static int pcf857x_remove(struct i2c_client *client)
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{
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	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
 | 
						|
	struct pcf857x			*gpio = i2c_get_clientdata(client);
 | 
						|
	int				status = 0;
 | 
						|
 | 
						|
	if (pdata && pdata->teardown) {
 | 
						|
		status = pdata->teardown(client,
 | 
						|
				gpio->chip.base, gpio->chip.ngpio,
 | 
						|
				pdata->context);
 | 
						|
		if (status < 0) {
 | 
						|
			dev_err(&client->dev, "%s --> %d\n",
 | 
						|
					"teardown", status);
 | 
						|
			return status;
 | 
						|
		}
 | 
						|
	}
 | 
						|
 | 
						|
	if (client->irq)
 | 
						|
		pcf857x_irq_domain_cleanup(gpio);
 | 
						|
 | 
						|
	gpiochip_remove(&gpio->chip);
 | 
						|
	return status;
 | 
						|
}
 | 
						|
 | 
						|
static struct i2c_driver pcf857x_driver = {
 | 
						|
	.driver = {
 | 
						|
		.name	= "pcf857x",
 | 
						|
		.owner	= THIS_MODULE,
 | 
						|
		.of_match_table = of_match_ptr(pcf857x_of_table),
 | 
						|
	},
 | 
						|
	.probe	= pcf857x_probe,
 | 
						|
	.remove	= pcf857x_remove,
 | 
						|
	.id_table = pcf857x_id,
 | 
						|
};
 | 
						|
 | 
						|
static int __init pcf857x_init(void)
 | 
						|
{
 | 
						|
	return i2c_add_driver(&pcf857x_driver);
 | 
						|
}
 | 
						|
/* register after i2c postcore initcall and before
 | 
						|
 * subsys initcalls that may rely on these GPIOs
 | 
						|
 */
 | 
						|
subsys_initcall(pcf857x_init);
 | 
						|
 | 
						|
static void __exit pcf857x_exit(void)
 | 
						|
{
 | 
						|
	i2c_del_driver(&pcf857x_driver);
 | 
						|
}
 | 
						|
module_exit(pcf857x_exit);
 | 
						|
 | 
						|
MODULE_LICENSE("GPL");
 | 
						|
MODULE_AUTHOR("David Brownell");
 |