dba4b74d2d
Introduce netdev IOCTLs, to be used by the debug tools. Allows to read/write single dword value or memory block, aligned to dword Different address modes supported: - BAR offset - Firmware "linker" address - target's AHB bus Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
87 lines
2.3 KiB
C
87 lines
2.3 KiB
C
/*
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* Copyright (c) 2014 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __WIL6210_UAPI_H__
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#define __WIL6210_UAPI_H__
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#if !defined(__KERNEL__)
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#define __user
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#endif
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#include <linux/sockios.h>
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/* Numbers SIOCDEVPRIVATE and SIOCDEVPRIVATE + 1
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* are used by Android devices to implement PNO (preferred network offload).
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* Albeit it is temporary solution, use different numbers to avoid conflicts
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*/
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/**
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* Perform 32-bit I/O operation to the card memory
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*
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* User code should arrange data in memory like this:
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*
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* struct wil_memio io;
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* struct ifreq ifr = {
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* .ifr_data = &io,
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* };
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*/
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#define WIL_IOCTL_MEMIO (SIOCDEVPRIVATE + 2)
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/**
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* Perform block I/O operation to the card memory
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*
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* User code should arrange data in memory like this:
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*
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* void *buf;
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* struct wil_memio_block io = {
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* .block = buf,
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* };
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* struct ifreq ifr = {
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* .ifr_data = &io,
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* };
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*/
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#define WIL_IOCTL_MEMIO_BLOCK (SIOCDEVPRIVATE + 3)
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/**
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* operation to perform
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*
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* @wil_mmio_op_mask - bits defining operation,
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* @wil_mmio_addr_mask - bits defining addressing mode
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*/
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enum wil_memio_op {
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wil_mmio_read = 0,
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wil_mmio_write = 1,
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wil_mmio_op_mask = 0xff,
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wil_mmio_addr_linker = 0 << 8,
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wil_mmio_addr_ahb = 1 << 8,
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wil_mmio_addr_bar = 2 << 8,
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wil_mmio_addr_mask = 0xff00,
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};
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struct wil_memio {
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uint32_t op; /* enum wil_memio_op */
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uint32_t addr; /* should be 32-bit aligned */
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uint32_t val;
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};
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struct wil_memio_block {
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uint32_t op; /* enum wil_memio_op */
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uint32_t addr; /* should be 32-bit aligned */
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uint32_t size; /* should be multiple of 4 */
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void __user *block; /* block address */
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};
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#endif /* __WIL6210_UAPI_H__ */
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